{"id":2228395,"url":"http://patchwork.ozlabs.org/api/1.1/covers/2228395/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/cover/20260426134002.865628-1-richard.henderson@linaro.org/","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.1/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260426134002.865628-1-richard.henderson@linaro.org>","date":"2026-04-26T13:38:37","name":"[RFC,00/84] fpu: Export some internals for targets","submitter":{"id":72104,"url":"http://patchwork.ozlabs.org/api/1.1/people/72104/?format=json","name":"Richard Henderson","email":"richard.henderson@linaro.org"},"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/cover/20260426134002.865628-1-richard.henderson@linaro.org/mbox/","series":[{"id":501533,"url":"http://patchwork.ozlabs.org/api/1.1/series/501533/?format=json","web_url":"http://patchwork.ozlabs.org/project/qemu-devel/list/?series=501533","date":"2026-04-26T13:38:37","name":"fpu: Export some internals for targets","version":1,"mbox":"http://patchwork.ozlabs.org/series/501533/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2228395/comments/","headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=tRCQsfbS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists1p.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists1p.gnu.org (lists1p.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g3SXR14mPz1yJ1\n\tfor ; Sun, 26 Apr 2026 23:41:25 +1000 (AEST)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists1p.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1wGzio-0006t7-VG; Sun, 26 Apr 2026 09:40:32 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists1p.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1wGziY-0006jw-Ld\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:40:16 -0400","from mail-pg1-x52b.google.com ([2607:f8b0:4864:20::52b])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1wGziW-0008Ea-2b\n for qemu-devel@nongnu.org; Sun, 26 Apr 2026 09:40:14 -0400","by mail-pg1-x52b.google.com with SMTP id\n 41be03b00d2f7-c76bde70ec9so3669682a12.2\n for ; Sun, 26 Apr 2026 06:40:11 -0700 (PDT)","from stoup.. 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A pattern such as\n\n FloatParts t;\n foo(&t, ...);\n\nwill zero t before calling foo, whereas\n\n FloatParts t = foo(...);\n\nwill not.\n\nI have not converted everything, only enough to do the testing\nof the target/ patches at the end. Comments?\n\n\nr~\n\n\nRichard Henderson (84):\n fpu: Drop parts_canonicalize\n fpu: Drop parts_uncanon\n fpu: Drop parts_uncanon_normal\n fpu: Drop parts_default_nan\n fpu: Drop parts_silence_nan\n fpu: Drop parts_return_nan\n fpu: Drop parts_pick_nan\n fpu: Drop parts_pick_nan_muladd\n fpu: Reverse the order of softfloat-parts* inclusions\n fpu: Drop parts_{add,sub}_normal\n fpu: Drop parts_addsub\n fpu: Drop parts_mul\n fpu: Drop parts_muladd_scalbn\n fpu: Drop parts_div\n fpu: Drop parts_modrem\n fpu: Drop parts_sqrt\n fpu: Drop parts_round_to_int_normal\n fpu: Drop parts_round_to_int\n fpu: Drop parts_float_to_sint\n fpu: Drop parts_float_to_uint\n fpu: Drop parts_float_to_sint_modulo\n fpu: Drop parts_sint_to_float\n fpu: Drop parts_uint_to_float\n fpu: Drop parts_minmax\n fpu: Drop parts_compare\n fpu: Drop parts_scalbn\n fpu: Drop parts_log2\n fpu: Drop parts_float_to_float\n fpu: Drop PARTS_GENERIC_64_128{_256}\n fpu: Drop FRAC_GENERIC_64_128{_256}\n fpu: Constify frac{64,128,256}_* inputs\n fpu: Return structure from unpack_raw64\n fpu: Return struct from float4_e2m1_unpack_canonical\n fpu: Return struct from float8_e4m3_unpack_canonical\n fpu: Return struct from float8_e5m2_unpack_canonical\n fpu: Inline float16_unpack_raw into callers\n fpu: Return struct from float16a_unpack_canonical\n fpu: Return struct from float16_unpack_canonical\n fpu: Inline bfloat16_unpack_raw into callers\n fpu: Return struct from bfloat16_unpack_canonical\n fpu: Inline float32_unpack_raw into callers\n fpu: Inline float64_unpack_raw into callers\n fpu: Return struct from float{32,64}_unpack_canonical\n fpu: Inline floatx80_unpack_raw into only caller\n fpu: Return struct from float128_unpack_raw\n fpu: Return struct from float128_unpack_canonical\n fpu: Change parts_float_to_float_narrow to parts128_to_parts64\n fpu: Change parts_float_to_float_widen to parts64_to_parts128\n fpu: Inline float8_e4m3_pack_raw to single caller\n fpu: Inline float8_e5m2_pack_raw into single caller\n fpu: Inline float16_pack_raw into callers\n fpu: Inline bfloat16_pack_raw into callers\n fpu: Inline float32_pack_raw into callers\n fpu: Inline float64_pack_raw into callers\n fpu: Mark unpack_raw64 QEMU_ALWAYS_INLINE\n fpu: Mark pack_raw64 QEMU_ALWAYS_INLINE\n fpu: Split FloatParts{64,128} to softfloat-parts.h\n fpu: Export FloatFmt structures\n fpu: Export unpack_canonical and round_pack_canonical routines\n fpu: Return struct from parts{64,128}_default_nan\n fpu: Return struct from parts{64,128}_silence_nan\n fpu: Return struct from parts{64,128}_return_nan\n fpu: Sink exp_bias adjustment in float64r32_pack_raw\n fpu: Return struct from parts{64,128}_pick_nan\n fpu: Return struct from parts{64,128}_div\n fpu: Return struct from parts{64,128}_round_to_int\n fpu: Use parts64_round_to_int in parts_s390_divide_to_integer\n fpu: Export default_nan and pick_nan routines\n fpu: Introduce parts64_round_canonical\n fpu: Export parts{64,128}_div\n fpu: Export parts{64,128}_round_to_int\n fpu: Return struct from parts{64,128}_pick_nan_muladd\n fpu: Introduce record_denormals_used\n fpu: Return struct from parts{64,128}_muladd_scalbn\n fpu: Drop QEMU_FLATTEN from muladd routines\n fpu: Export parts{64,128}_compare\n fpu: Return struct from parts{64,128}_mul\n fpu: Hoist nan check in partsN_addsub\n fpu: Return struct from parts{64,128}_addsub\n fpu: Simplify 0 +/- N case in parts_addsub\n target/s390x: Move float{32,64}_s390_divide_to_integer\n target/arm: Use FloatParts64 in bfdotadd_ebf\n target/arm: Drop oddstatus from is_ebf and bfdotadd_ebf\n target/arm: Use FloatParts64 in f16_dotadd\n\n include/fpu/softfloat-parts.h | 223 ++++\n include/fpu/softfloat.h | 11 -\n target/arm/tcg/vec_internal.h | 12 +-\n fpu/softfloat.c | 2124 +++++++++++-------------------\n target/arm/tcg/sme_helper.c | 102 +-\n target/arm/tcg/vec_helper.c | 127 +-\n target/s390x/tcg/fpu_helper.c | 135 ++\n fpu/softfloat-parts-addsub.c.inc | 22 +-\n fpu/softfloat-parts.c.inc | 723 ++++------\n fpu/softfloat-specialize.c.inc | 42 +-\n 10 files changed, 1529 insertions(+), 1992 deletions(-)\n create mode 100644 include/fpu/softfloat-parts.h"}