{"id":2226558,"url":"http://patchwork.ozlabs.org/api/1.1/covers/2226558/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/cover/cover.1776872453.git.happycpu@gmail.com/","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.1/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"","date":"2026-04-22T16:05:02","name":"[v1,0/2] gpio: 74x164: seed the chain from DT at probe time","submitter":{"id":93205,"url":"http://patchwork.ozlabs.org/api/1.1/people/93205/?format=json","name":"Chanhong Jung","email":"happycpu@gmail.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/cover/cover.1776872453.git.happycpu@gmail.com/mbox/","series":[{"id":501038,"url":"http://patchwork.ozlabs.org/api/1.1/series/501038/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-gpio/list/?series=501038","date":"2026-04-22T16:05:02","name":"gpio: 74x164: seed the chain from DT at probe time","version":1,"mbox":"http://patchwork.ozlabs.org/series/501038/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2226558/comments/","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=pwSGLXR3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=104.64.211.4; helo=sin.lore.kernel.org;\n envelope-from=linux-gpio+bounces-35361-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"pwSGLXR3\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.210.180","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"],"Received":["from sin.lore.kernel.org (sin.lore.kernel.org [104.64.211.4])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4g13yl6GYJz1yD5\n\tfor ; Thu, 23 Apr 2026 02:07:27 +1000 (AEST)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id F3081302AB73\n\tfor ; Wed, 22 Apr 2026 16:05:26 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 139B137D13A;\n\tWed, 22 Apr 2026 16:05:13 +0000 (UTC)","from mail-pf1-f180.google.com (mail-pf1-f180.google.com\n [209.85.210.180])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id CE4B937D10A\n\tfor ; Wed, 22 Apr 2026 16:05:10 +0000 (UTC)","by mail-pf1-f180.google.com with SMTP id\n d2e1a72fcca58-82735a41920so2325072b3a.2\n for ;\n Wed, 22 Apr 2026 09:05:10 -0700 (PDT)","from happycpu-p1.. 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charset=UTF-8","Content-Transfer-Encoding":"8bit"},"content":"Hi all,\n\nThis short series lets the 74HC595/74LVC594 shift-register driver\ninitialise its chain to a board-specified pattern before the gpiochip\nis registered, via a new optional 'registers-default' DT property.\n\nMotivation\n----------\n\n74HC595 chains latch their outputs from the first serial write onwards.\nThe current driver always issues that first write from a zeroed buffer\nduring probe, so every output comes up low until user space intervenes.\n\nBoards that wire the chain to signals whose power-on state matters\n(active-low indicators, reset lines, early-boot status LEDs, etc.) have\nno DT-level way to express the intended initial pattern today, and must\nrecreate it in user space after every probe.\n\nThe property and layout documented here have been honoured by U-Boot's\nmatching driver (drivers/gpio/74x164_gpio.c) for years, so this change\nalso restores binding parity between the two boot stages: whichever one\nowns the chain first can leave it in a known state for the next.\n\nValidation\n----------\n\nTested on stm32mp153d-ssonic, which drives 16 active-low LEDs from two\ncascaded 74HC595s with 'registers-default = /bits/ 8 <0xff 0xff 0x00\n0x00>;'. With the series applied, the LED bank comes up in its defined\noff-state from probe onwards; without it, the bank flashes on briefly\non every reboot until the user-space init writes the pattern.\n\nTooling:\n - scripts/checkpatch.pl --strict: 0 errors, 0 warnings on each patch\n - make dt_binding_check DT_SCHEMA_FILES=fairchild,74hc595: passes\n (example DTS extracted, compiled, and validated against the new\n schema)\n - dt-validate on a built stm32mp153d-ssonic.dtb against the updated\n processed-schema.json: 'registers-default' accepted cleanly; no\n regressions against the rest of the 74hc595 binding\n\nPatch 1 adds the binding property. Patch 2 consumes it in the driver.\n\nThanks for your time and reviews — feedback very welcome.\n\nChanhong\n\nChanhong Jung (2):\n dt-bindings: gpio: fairchild,74hc595: add registers-default property\n gpio: 74x164: support 'registers-default' DT property for initial\n state\n\n .../bindings/gpio/fairchild,74hc595.yaml | 10 ++++++++++\n drivers/gpio/gpio-74x164.c | 14 ++++++++++++++\n 2 files changed, 24 insertions(+)\n\n--\n2.34.1"}