{"id":2221022,"url":"http://patchwork.ozlabs.org/api/1.1/covers/2221022/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/cover/20260408170818.70322-1-piyushpatle228@gmail.com/","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/1.1/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260408170818.70322-1-piyushpatle228@gmail.com>","date":"2026-04-08T17:08:16","name":"[v2,0/2] ASoC: tegra210: simplify byte map handling in ADX and AMX","submitter":{"id":92665,"url":"http://patchwork.ozlabs.org/api/1.1/people/92665/?format=json","name":"Piyush Patle","email":"piyushpatle228@gmail.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/cover/20260408170818.70322-1-piyushpatle228@gmail.com/mbox/","series":[{"id":499165,"url":"http://patchwork.ozlabs.org/api/1.1/series/499165/?format=json","web_url":"http://patchwork.ozlabs.org/project/linux-tegra/list/?series=499165","date":"2026-04-08T17:08:16","name":"ASoC: tegra210: simplify byte map handling in ADX and AMX","version":2,"mbox":"http://patchwork.ozlabs.org/series/499165/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2221022/comments/","headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=lebtebPl;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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This is because the control range exposed to\nuserspace is [0, 256], where 256 is the \"disabled\" sentinel and\ndoes not fit in a byte, so the two arrays have to be cross-checked\non every get()/put().\n\nThis series stores each slot as a u16 holding the user-visible\nvalue directly, turning get_byte_map() into a direct return and\nput_byte_map() into a compare-and-store. The hardware-facing packed\nRAM word and the IN_BYTE_EN / OUT_BYTE_EN enable masks are computed\non the fly inside each write_map_ram() callback, which is the only\nplace that needs to know the hardware layout. The byte_mask[] field\nis dropped from both driver state structs.\n\nThere is no userspace-visible ABI change. Control declarations,\nranges, initial values and handling of out-of-range writes is\npreserved by treating values outside [0, 255] as disabled (256),\nmatching previous behavior. As a side effect each patch also fixes\na latent bug in put_byte_map() where an enabled-to-enabled value\nchange was not persisted.\n\nThe packed RAM word construction is also updated to ensure the shift\noperates on a u32 value, avoiding potential undefined behavior due\nto signed integer promotion.\n\nAddresses TODO comments left in tegra210_{adx,amx}_get_byte_map().\n\nChanges since v1:\n - Allocate byte_mask[] dynamically using kcalloc() based on\n soc_data->byte_mask_size instead of fixed-size arrays\n - Propagate -ENOMEM from write_map_ram() to callers\n - Replace magic numbers with TEGRA_{ADX,AMX}_SLOTS_PER_WORD\n - Use BITS_PER_BYTE and BITS_PER_TYPE() instead of literal shifts\n - Add and includes\n\nPatch 1/2: ASoC: tegra210_adx: simplify byte map get/put logic\nPatch 2/2: ASoC: tegra210_amx: simplify byte map get/put logic"}