{"id":2220780,"url":"http://patchwork.ozlabs.org/api/1.1/covers/2220780/?format=json","web_url":"http://patchwork.ozlabs.org/project/kvm-riscv/cover/20260407-riscv_insn_table-v1-0-54b4736a1e77@gmail.com/","project":{"id":70,"url":"http://patchwork.ozlabs.org/api/1.1/projects/70/?format=json","name":"Linux KVM RISC-V","link_name":"kvm-riscv","list_id":"kvm-riscv.lists.infradead.org","list_email":"kvm-riscv@lists.infradead.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260407-riscv_insn_table-v1-0-54b4736a1e77@gmail.com>","date":"2026-04-08T04:45:48","name":"[00/16] riscv: Generate riscv instruction functions","submitter":{"id":92521,"url":"http://patchwork.ozlabs.org/api/1.1/people/92521/?format=json","name":"Charlie Jenkins via B4 Relay","email":"devnull+thecharlesjenkins.gmail.com@kernel.org"},"mbox":"http://patchwork.ozlabs.org/project/kvm-riscv/cover/20260407-riscv_insn_table-v1-0-54b4736a1e77@gmail.com/mbox/","series":[{"id":499063,"url":"http://patchwork.ozlabs.org/api/1.1/series/499063/?format=json","web_url":"http://patchwork.ozlabs.org/project/kvm-riscv/list/?series=499063","date":"2026-04-08T04:45:48","name":"riscv: Generate riscv instruction functions","version":1,"mbox":"http://patchwork.ozlabs.org/series/499063/mbox/"}],"comments":"http://patchwork.ozlabs.org/api/covers/2220780/comments/","headers":{"Return-Path":"\n ","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=jHWeKXdG;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=UroqgO/4;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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b=H4sIAHzd1WkC/6tWKk4tykwtVrJSqFYqSi3LLM7MzwNyDHUUlJIzE\n vPSU3UzU4B8JSMDIzMDQ0MT3aLM4uSy+My84rz4ksSknFRdYwsTS1MgSklLMVYCaisoSk3LrAA\n bGR1bWwsAp7/tpmIAAAA=","X-Change-ID":"20260114-riscv_insn_table-38495495dfd3","To":"Paul Walmsley , Palmer Dabbelt ,\n Alexandre Ghiti , Anup Patel ,\n Atish Patra , Conor Dooley ,\n Paolo Bonzini ,\n Andrew Morton , Shuah Khan ","Cc":"linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org,\n kvm@vger.kernel.org, kvm-riscv@lists.infradead.org,\n linux-kselftest@vger.kernel.org,\n Charlie Jenkins ","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1775623594; l=4407;\n i=thecharlesjenkins@gmail.com; s=2026030; h=from:subject:message-id;\n bh=rAI1CPLDiRKGIxKOZmRu8/zalWKsDkVpDctGcchvfIE=;\n b=7x4PTXIx7EN/ZzSPl1d5lxpRaBvp9CB1dq+sX9CzPHHqqpAtcEoH3dqwO/afl/RvHYNThe8tm\n 1JDOesSdpzHC7U26ZY76EtB28pEehaqQG4YrIuubLCvZW2hYfdIYjkF","X-Developer-Key":"i=thecharlesjenkins@gmail.com; a=ed25519;\n pk=vpF2USrG+aB6CTbSt34rzJKsAVe/l+GAXo1IomCMETk=","X-Endpoint-Received":"by B4 Relay for thecharlesjenkins@gmail.com/2026030\n with auth_id=663","X-Original-From":"Charlie Jenkins ","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20260407_214638_081158_34719D55 ","X-CRM114-Status":"GOOD ( 14.73 )","X-Spam-Score":"-0.0 (/)","X-Spam-Report":"Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: There is a lot of code that is manually manipulating riscv\n instructions. Constructing these headers for new instructions is time\n consuming\n and error prone. The first patch in this series introduces the instruction\n definition table along with a script that runs at compile time to create\n all of the associated instruction manipulation functions. The remaini [...] \n Content analysis details: (-0.0 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 SPF_PASS SPF: sender matches SPF record\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 2.1 FREEMAIL_FORGED_REPLYTO Freemail in Reply-To, but not From","X-BeenThere":"kvm-riscv@lists.infradead.org","X-Mailman-Version":"2.1.34","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Reply-To":"thecharlesjenkins@gmail.com","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"kvm-riscv\" ","Errors-To":"kvm-riscv-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"},"content":"There is a lot of code that is manually manipulating riscv instructions.\nConstructing these headers for new instructions is time consuming and\nerror prone.\n\nThe first patch in this series introduces the instruction definition\ntable along with a script that runs at compile time to create all of the\nassociated instruction manipulation functions. The remaining patches\nmigrate all of the manual instruction code to use these generated\nfunctions.\n\nThe instruction definition table is generated from the riscv-unified-db[1],\nan open source RVI project for instruction specifications. I am sending\nthis series at the same time as I am sending the patch to the\nriscv-unified-db for the format of the instruction table. That patch can\nbe accessed on github [2].\n\nA lot of the validation for these changes is from running all possible\n32-bit or 16-bit integers through these functions to see that any given\ninstruction will produce to expected result. I give more detail on the\ntest cases in the notes of the first couple of patches.\n\nFor the KVM patches, I also introduce two test cases to ensure that the\ninstruction manipulation is working as expected, along with a bug fix of\nthe current implemention.\n\n[1] https://github.com/riscv/riscv-unified-db\n[2] https://github.com/riscv/riscv-unified-db/pull/1780\n\nSigned-off-by: Charlie Jenkins \n---\nCharlie Jenkins (16):\n riscv: Introduce instruction table generation\n riscv: alternatives: Use generated instruction headers for patching code\n riscv: kgdb: Use generated instruction headers\n riscv: kprobes: Use generated instruction headers\n riscv: cfi: Use generated instruction headers\n riscv: Use generated instruction headers for misaligned loads/stores\n riscv: kvm: Use generated instruction headers for csr code\n riscv: kvm: Fix MMIO emulation for sign-extended insns\n KVM: device: Add test device\n KVM: riscv: selftests: Add mmio test\n riscv: kvm: Use generated instruction headers for mmio emulation\n riscv: kvm: Add emulated test csr\n KVM: riscv: selftests: Add csr emulation test\n riscv: kvm: Use generated instruction headers for csr emulation\n riscv: kexec: Use generated instruction headers for kexec relocations\n riscv: Remove unused instruction headers\n\n arch/riscv/Kconfig.debug | 1 +\n arch/riscv/Makefile | 3 +\n arch/riscv/include/asm/Kbuild | 1 +\n arch/riscv/include/asm/insn.h | 563 +---------\n arch/riscv/include/asm/kvm_host.h | 10 +\n arch/riscv/include/asm/kvm_vcpu_insn.h | 5 +-\n arch/riscv/include/asm/kvm_vcpu_test_csr.h | 15 +\n arch/riscv/kernel/alternative.c | 23 +-\n arch/riscv/kernel/cfi.c | 6 +-\n arch/riscv/kernel/kgdb.c | 102 +-\n arch/riscv/kernel/machine_kexec_file.c | 55 +-\n arch/riscv/kernel/probes/decode-insn.c | 7 +-\n arch/riscv/kernel/probes/simulate-insn.c | 253 ++---\n arch/riscv/kernel/probes/simulate-insn.h | 7 +-\n arch/riscv/kernel/traps_misaligned.c | 183 ++--\n arch/riscv/kvm/Kconfig.debug | 16 +\n arch/riscv/kvm/Makefile | 1 +\n arch/riscv/kvm/vcpu_insn.c | 233 ++---\n arch/riscv/kvm/vcpu_test_csr.c | 21 +\n arch/riscv/tools/Makefile | 22 +\n arch/riscv/tools/insn.tbl | 1391 +++++++++++++++++++++++++\n arch/riscv/tools/insn_tbl.sh | 263 +++++\n include/uapi/linux/kvm.h | 2 +\n lib/Kconfig.debug | 6 +\n tools/testing/selftests/kvm/Makefile.kvm | 2 +\n tools/testing/selftests/kvm/riscv/csr_test.c | 123 +++\n tools/testing/selftests/kvm/riscv/mmio_test.c | 184 ++++\n virt/kvm/Kconfig.debug | 16 +\n virt/kvm/Makefile.kvm | 1 +\n virt/kvm/kvm_main.c | 8 +\n virt/kvm/mmio_test.c | 95 ++\n virt/kvm/mmio_test.h | 18 +\n 32 files changed, 2624 insertions(+), 1012 deletions(-)\n---\nbase-commit: dd9b004b7ff3289fb7bae35130c0a5c0537266af\nchange-id: ${change-id}\n\n- Charlie"}