{"id":492211,"url":"http://patchwork.ozlabs.org/api/1.0/series/492211/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"name":"HVF: Add support for platform vGIC and nested virtualisation","date":"2026-02-15T11:25:32","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/1.0/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"version":10,"total":14,"received_total":14,"received_all":true,"mbox":"http://patchwork.ozlabs.org/series/492211/mbox/","cover_letter":{"id":2196592,"url":"http://patchwork.ozlabs.org/api/1.0/covers/2196592/?format=json","msgid":"<20260215112543.4817-1-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:29","name":"[v10,00/14] HVF: Add support for platform vGIC and nested virtualisation"},"patches":[{"id":2196589,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196589/?format=json","msgid":"<20260215112543.4817-2-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:30","name":"[v10,01/14] Revert \"target/arm/hvf: Sync CNTV_CTL_EL0 & CNTV_CVAL_EL0\"","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-2-mohamed@unpredictable.fr/mbox/"},{"id":2196594,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196594/?format=json","msgid":"<20260215112543.4817-3-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:31","name":"[v10,02/14] hw/intc: Add hvf vGIC interrupt controller support","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-3-mohamed@unpredictable.fr/mbox/"},{"id":2196588,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196588/?format=json","msgid":"<20260215112543.4817-4-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:32","name":"[v10,03/14] hw/intc: arm_gicv3_hvf: save/restore Apple GIC state","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-4-mohamed@unpredictable.fr/mbox/"},{"id":2196593,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196593/?format=json","msgid":"<20260215112543.4817-5-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:33","name":"[v10,04/14] accel, hw/arm, include/system/hvf: infrastructure changes for HVF vGIC","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-5-mohamed@unpredictable.fr/mbox/"},{"id":2196596,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196596/?format=json","msgid":"<20260215112543.4817-6-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:34","name":"[v10,05/14] target/arm: hvf: instantiate GIC early","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-6-mohamed@unpredictable.fr/mbox/"},{"id":2196590,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196590/?format=json","msgid":"<20260215112543.4817-7-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:35","name":"[v10,06/14] hw/arm, target/arm: nested virtualisation on HVF","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-7-mohamed@unpredictable.fr/mbox/"},{"id":2196599,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196599/?format=json","msgid":"<20260215112543.4817-8-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:36","name":"[v10,07/14] hvf: only call hvf_sync_vtimer() when running without the platform vGIC","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-8-mohamed@unpredictable.fr/mbox/"},{"id":2196602,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196602/?format=json","msgid":"<20260215112543.4817-9-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:37","name":"[v10,08/14] hvf: gate ARM_FEATURE_PMU register emulation behind not being at EL2","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-9-mohamed@unpredictable.fr/mbox/"},{"id":2196601,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196601/?format=json","msgid":"<20260215112543.4817-10-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:38","name":"[v10,09/14] hvf: arm: allow exposing minimal PMU when running with nested virt on","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-10-mohamed@unpredictable.fr/mbox/"},{"id":2196597,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196597/?format=json","msgid":"<20260215112543.4817-11-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:39","name":"[v10,10/14] target/arm: hvf: add asserts for code paths not leveraged when using the vGIC","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-11-mohamed@unpredictable.fr/mbox/"},{"id":2196595,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196595/?format=json","msgid":"<20260215112543.4817-12-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:40","name":"[v10,11/14] hvf: sync registers used at EL2","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-12-mohamed@unpredictable.fr/mbox/"},{"id":2196600,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196600/?format=json","msgid":"<20260215112543.4817-13-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:41","name":"[v10,12/14] target/arm: hvf: pass through CNTHCTL_EL2 and MDCCINT_EL1","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-13-mohamed@unpredictable.fr/mbox/"},{"id":2196591,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196591/?format=json","msgid":"<20260215112543.4817-14-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:42","name":"[v10,13/14] hvf: enable nested virtualisation support","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-14-mohamed@unpredictable.fr/mbox/"},{"id":2196598,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196598/?format=json","msgid":"<20260215112543.4817-15-mohamed@unpredictable.fr>","date":"2026-02-15T11:25:43","name":"[v10,14/14] hvf: arm: warn instead of assert on a write_list_to_cpustate mismatch","mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-15-mohamed@unpredictable.fr/mbox/"}]}