{"id":809872,"url":"http://patchwork.ozlabs.org/api/1.0/patches/809872/?format=json","project":{"id":15,"url":"http://patchwork.ozlabs.org/api/1.0/projects/15/?format=json","name":"Ubuntu Kernel","link_name":"ubuntu-kernel","list_id":"kernel-team.lists.ubuntu.com","list_email":"kernel-team@lists.ubuntu.com","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20170905000617.21888-2-daniel.axtens@canonical.com>","date":"2017-09-05T00:06:17","name":"[SRU,Xenial,1/1] KVM: PPC: Book3S HV: Enable TM before accessing TM registers","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ed0a14d4427851dc71887bae118b7f7045205dab","submitter":{"id":71548,"url":"http://patchwork.ozlabs.org/api/1.0/people/71548/?format=json","name":"Daniel Axtens","email":"daniel.axtens@canonical.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/ubuntu-kernel/patch/20170905000617.21888-2-daniel.axtens@canonical.com/mbox/","series":[{"id":1468,"url":"http://patchwork.ozlabs.org/api/1.0/series/1468/?format=json","date":"2017-09-05T00:06:16","name":"Fixes for LP#1714420","version":1,"mbox":"http://patchwork.ozlabs.org/series/1468/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/809872/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.ubuntu.com\n\t(client-ip=91.189.94.19; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"kernel-team-bounces@lists.ubuntu.com","Sender":"\"kernel-team\" "},"content":"BugLink: https://bugs.launchpad.net/bugs/1714420\n\nCommit 46a704f8409f (\"KVM: PPC: Book3S HV: Preserve userspace HTM state\nproperly\", 2017-06-15) added code to read transactional memory (TM)\nregisters but forgot to enable TM before doing so. The result is\nthat if userspace does have live values in the TM registers, a KVM_RUN\nioctl will cause a host kernel crash like this:\n\n[ 181.328511] Unrecoverable TM Unavailable Exception f60 at d00000001e7d9980\n[ 181.328605] Oops: Unrecoverable TM Unavailable Exception, sig: 6 [#1]\n[ 181.328613] SMP NR_CPUS=2048\n[ 181.328613] NUMA\n[ 181.328618] PowerNV\n[ 181.328646] Modules linked in: vhost_net vhost tap nfs_layout_nfsv41_files rpcsec_gss_krb5 nfsv4 dns_resolver nfs\n+fscache xt_CHECKSUM iptable_mangle ipt_MASQUERADE nf_nat_masquerade_ipv4 iptable_nat nf_nat_ipv4 nf_nat\n+nf_conntrack_ipv4 nf_defrag_ipv4 xt_conntrack nf_conntrack ipt_REJECT nf_reject_ipv4 tun ebtable_filter ebtables\n+ip6table_filter ip6_tables iptable_filter bridge stp llc kvm_hv kvm nfsd ses enclosure scsi_transport_sas ghash_generic\n+auth_rpcgss gf128mul xts sg ctr nfs_acl lockd vmx_crypto shpchp ipmi_powernv i2c_opal grace ipmi_devintf i2c_core\n+powernv_rng sunrpc ipmi_msghandler ibmpowernv uio_pdrv_genirq uio leds_powernv powernv_op_panel ip_tables xfs sd_mod\n+lpfc ipr bnx2x libata mdio ptp pps_core scsi_transport_fc libcrc32c dm_mirror dm_region_hash dm_log dm_mod\n[ 181.329278] CPU: 40 PID: 9926 Comm: CPU 0/KVM Not tainted 4.12.0+ #1\n[ 181.329337] task: c000003fc6980000 task.stack: c000003fe4d80000\n[ 181.329396] NIP: d00000001e7d9980 LR: d00000001e77381c CTR: d00000001e7d98f0\n[ 181.329465] REGS: c000003fe4d837e0 TRAP: 0f60 Not tainted (4.12.0+)\n[ 181.329523] MSR: 9000000000009033 \n[ 181.329527] CR: 24022448 XER: 00000000\n[ 181.329608] CFAR: d00000001e773818 SOFTE: 1\n[ 181.329608] GPR00: d00000001e77381c c000003fe4d83a60 d00000001e7ef410 c000003fdcfe0000\n[ 181.329608] GPR04: c000003fe4f00000 0000000000000000 0000000000000000 c000003fd7954800\n[ 181.329608] GPR08: 0000000000000001 c000003fc6980000 0000000000000000 d00000001e7e2880\n[ 181.329608] GPR12: d00000001e7d98f0 c000000007b19000 00000001295220e0 00007fffc0ce2090\n[ 181.329608] GPR16: 0000010011886608 00007fff8c89f260 0000000000000001 00007fff8c080028\n[ 181.329608] GPR20: 0000000000000000 00000100118500a6 0000010011850000 0000010011850000\n[ 181.329608] GPR24: 00007fffc0ce1b48 0000010011850000 00000000d673b901 0000000000000000\n[ 181.329608] GPR28: 0000000000000000 c000003fdcfe0000 c000003fdcfe0000 c000003fe4f00000\n[ 181.330199] NIP [d00000001e7d9980] kvmppc_vcpu_run_hv+0x90/0x6b0 [kvm_hv]\n[ 181.330264] LR [d00000001e77381c] kvmppc_vcpu_run+0x2c/0x40 [kvm]\n[ 181.330322] Call Trace:\n[ 181.330351] [c000003fe4d83a60] [d00000001e773478] kvmppc_set_one_reg+0x48/0x340 [kvm] (unreliable)\n[ 181.330437] [c000003fe4d83b30] [d00000001e77381c] kvmppc_vcpu_run+0x2c/0x40 [kvm]\n[ 181.330513] [c000003fe4d83b50] [d00000001e7700b4] kvm_arch_vcpu_ioctl_run+0x114/0x2a0 [kvm]\n[ 181.330586] [c000003fe4d83bd0] [d00000001e7642f8] kvm_vcpu_ioctl+0x598/0x7a0 [kvm]\n[ 181.330658] [c000003fe4d83d40] [c0000000003451b8] do_vfs_ioctl+0xc8/0x8b0\n[ 181.330717] [c000003fe4d83de0] [c000000000345a64] SyS_ioctl+0xc4/0x120\n[ 181.330776] [c000003fe4d83e30] [c00000000000b004] system_call+0x58/0x6c\n[ 181.330833] Instruction dump:\n[ 181.330869] e92d0260 e9290b50 e9290108 792807e3 41820058 e92d0260 e9290b50 e9290108\n[ 181.330941] 792ae8a4 794a1f87 408204f4 e92d0260 <7d4022a6> f9490ff0 e92d0260 7d4122a6\n[ 181.331013] ---[ end trace 6f6ddeb4bfe92a92 ]---\n\nThe fix is just to turn on the TM bit in the MSR before accessing the\nregisters.\n\nCc: stable@vger.kernel.org # v3.14+\nFixes: 46a704f8409f (\"KVM: PPC: Book3S HV: Preserve userspace HTM state properly\")\nReported-by: Jan Stancek \nTested-by: Jan Stancek \nSigned-off-by: Paul Mackerras \n(cherry picked from commit e47057151422a67ce08747176fa21cb3b526a2c9)\nSigned-off-by: Daniel Axtens \n---\n arch/powerpc/kvm/book3s_hv.c | 2 ++\n 1 file changed, 2 insertions(+)","diff":"diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c\nindex 0283de0fe7d0..36e841e10db1 100644\n--- a/arch/powerpc/kvm/book3s_hv.c\n+++ b/arch/powerpc/kvm/book3s_hv.c\n@@ -2708,6 +2708,8 @@ static int kvmppc_vcpu_run_hv(struct kvm_run *run, struct kvm_vcpu *vcpu)\n \t\t\trun->fail_entry.hardware_entry_failure_reason = 0;\n \t\t\treturn -EINVAL;\n \t\t}\n+\t\t/* Enable TM so we can read the TM SPRs */\n+\t\tmtmsr(mfmsr() | MSR_TM);\n \t\tcurrent->thread.tm_tfhar = mfspr(SPRN_TFHAR);\n \t\tcurrent->thread.tm_tfiar = mfspr(SPRN_TFIAR);\n \t\tcurrent->thread.tm_texasr = mfspr(SPRN_TEXASR);\n","prefixes":["SRU","Xenial","1/1"]}