{"id":809697,"url":"http://patchwork.ozlabs.org/api/1.0/patches/809697/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<1504533662-198084-6-git-send-email-imammedo@redhat.com>","date":"2017-09-04T14:01:01","name":"[5/6] pc: use generic cpu_model parsing","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"31a7d5731ef52ac27d76777b6565786a75f0cbe2","submitter":{"id":11305,"url":"http://patchwork.ozlabs.org/api/1.0/people/11305/?format=json","name":"Igor Mammedov","email":"imammedo@redhat.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/1504533662-198084-6-git-send-email-imammedo@redhat.com/mbox/","series":[{"id":1390,"url":"http://patchwork.ozlabs.org/api/1.0/series/1390/?format=json","date":"2017-09-04T14:00:57","name":"generalize parsing of cpu_model (x86/arm)","version":1,"mbox":"http://patchwork.ozlabs.org/series/1390/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/809697/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=)","ext-mx10.extmail.prod.ext.phx2.redhat.com;\n\tdmarc=none (p=none dis=none) header.from=redhat.com","ext-mx10.extmail.prod.ext.phx2.redhat.com;\n\tspf=fail smtp.mailfrom=imammedo@redhat.com"],"Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xmBSF1dwdz9s75\n\tfor ;\n\tTue, 5 Sep 2017 00:05:01 +1000 (AEST)","from localhost ([::1]:44768 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t)\n\tid 1dorzn-0005fL-7M\n\tfor incoming@patchwork.ozlabs.org; Mon, 04 Sep 2017 10:04:59 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:48080)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from ) id 1dorwO-0003iQ-RT\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 10:01:34 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from ) id 1dorwG-00043g-SV\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 10:01:28 -0400","from mx1.redhat.com ([209.132.183.28]:50824)\n\tby eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from ) id 1dorwG-00041t-BY\n\tfor qemu-devel@nongnu.org; Mon, 04 Sep 2017 10:01:20 -0400","from smtp.corp.redhat.com\n\t(int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16])\n\t(using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby mx1.redhat.com (Postfix) with ESMTPS id 513B261D30;\n\tMon, 4 Sep 2017 14:01:19 +0000 (UTC)","from dell-r430-03.lab.eng.brq.redhat.com\n\t(dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60])\n\tby smtp.corp.redhat.com (Postfix) with ESMTP id 2D9BB820A2;\n\tMon, 4 Sep 2017 14:01:18 +0000 (UTC)"],"DMARC-Filter":"OpenDMARC Filter v1.3.2 mx1.redhat.com 513B261D30","From":"Igor Mammedov ","To":"qemu-devel@nongnu.org","Date":"Mon, 4 Sep 2017 16:01:01 +0200","Message-Id":"<1504533662-198084-6-git-send-email-imammedo@redhat.com>","In-Reply-To":"<1504533662-198084-1-git-send-email-imammedo@redhat.com>","References":"<1504533662-198084-1-git-send-email-imammedo@redhat.com>","X-Scanned-By":"MIMEDefang 2.79 on 10.5.11.16","X-Greylist":"Sender IP whitelisted, not delayed by milter-greylist-4.5.16\n\t(mx1.redhat.com [10.5.110.39]);\n\tMon, 04 Sep 2017 14:01:19 +0000 (UTC)","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic]\n\t[fuzzy]","X-Received-From":"209.132.183.28","Subject":"[Qemu-devel] [PATCH 5/6] pc: use generic cpu_model parsing","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"Andrew Jones , Eduardo Habkost ,\n\tRichard Henderson ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"define default CPU type in generic way in pc_machine_class_init()\nand let common machine code to handle cpu_model parsing\n\nPatch also introduces TARGET_DEFAULT_CPU_TYPE define for 2 purposes:\n * make foo_machine_class_init() look uniform on every target\n * use define in [bsd|linux]-user targets to pick default\n cpu type\n\nSigned-off-by: Igor Mammedov \n---\n target/i386/cpu.h | 9 +++++++++\n hw/i386/pc.c | 41 +++++------------------------------------\n hw/i386/pc_piix.c | 4 +---\n target/i386/cpu.c | 3 ---\n 4 files changed, 15 insertions(+), 42 deletions(-)","diff":"diff --git a/target/i386/cpu.h b/target/i386/cpu.h\nindex 525d35d..4035a11 100644\n--- a/target/i386/cpu.h\n+++ b/target/i386/cpu.h\n@@ -1508,6 +1508,15 @@ uint64_t cpu_get_tsc(CPUX86State *env);\n \n #define cpu_init(cpu_model) cpu_generic_init(TYPE_X86_CPU, cpu_model)\n \n+#define X86_CPU_TYPE_SUFFIX \"-\" TYPE_X86_CPU\n+#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)\n+\n+#ifdef TARGET_X86_64\n+#define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME(\"qemu64\")\n+#else\n+#define TARGET_DEFAULT_CPU_TYPE X86_CPU_TYPE_NAME(\"qemu32\")\n+#endif\n+\n #define cpu_signal_handler cpu_x86_signal_handler\n #define cpu_list x86_cpu_list\n \ndiff --git a/hw/i386/pc.c b/hw/i386/pc.c\nindex 2108104..2247ac0 100644\n--- a/hw/i386/pc.c\n+++ b/hw/i386/pc.c\n@@ -1107,7 +1107,6 @@ static void pc_new_cpu(const char *typename, int64_t apic_id, Error **errp)\n \n void pc_hot_add_cpu(const int64_t id, Error **errp)\n {\n- ObjectClass *oc;\n MachineState *ms = MACHINE(qdev_get_machine());\n int64_t apic_id = x86_cpu_apic_id_from_index(id);\n Error *local_err = NULL;\n@@ -1124,9 +1123,7 @@ void pc_hot_add_cpu(const int64_t id, Error **errp)\n return;\n }\n \n- assert(ms->possible_cpus->cpus[0].cpu); /* BSP is always present */\n- oc = OBJECT_CLASS(CPU_GET_CLASS(ms->possible_cpus->cpus[0].cpu));\n- pc_new_cpu(object_class_get_name(oc), apic_id, &local_err);\n+ pc_new_cpu(ms->cpu_type, apic_id, &local_err);\n if (local_err) {\n error_propagate(errp, local_err);\n return;\n@@ -1136,39 +1133,10 @@ void pc_hot_add_cpu(const int64_t id, Error **errp)\n void pc_cpus_init(PCMachineState *pcms)\n {\n int i;\n- CPUClass *cc;\n- ObjectClass *oc;\n- const char *typename;\n- gchar **model_pieces;\n const CPUArchIdList *possible_cpus;\n- MachineState *machine = MACHINE(pcms);\n+ MachineState *ms = MACHINE(pcms);\n MachineClass *mc = MACHINE_GET_CLASS(pcms);\n \n- /* init CPUs */\n- if (machine->cpu_model == NULL) {\n-#ifdef TARGET_X86_64\n- machine->cpu_model = \"qemu64\";\n-#else\n- machine->cpu_model = \"qemu32\";\n-#endif\n- }\n-\n- model_pieces = g_strsplit(machine->cpu_model, \",\", 2);\n- if (!model_pieces[0]) {\n- error_report(\"Invalid/empty CPU model name\");\n- exit(1);\n- }\n-\n- oc = cpu_class_by_name(TYPE_X86_CPU, model_pieces[0]);\n- if (oc == NULL) {\n- error_report(\"Unable to find CPU definition: %s\", model_pieces[0]);\n- exit(1);\n- }\n- typename = object_class_get_name(oc);\n- cc = CPU_CLASS(oc);\n- cc->parse_features(typename, model_pieces[1], &error_fatal);\n- g_strfreev(model_pieces);\n-\n /* Calculates the limit to CPU APIC ID values\n *\n * Limit for the APIC ID value, so that all\n@@ -1177,9 +1145,9 @@ void pc_cpus_init(PCMachineState *pcms)\n * This is used for FW_CFG_MAX_CPUS. See comments on bochs_bios_init().\n */\n pcms->apic_id_limit = x86_cpu_apic_id_from_index(max_cpus - 1) + 1;\n- possible_cpus = mc->possible_cpu_arch_ids(machine);\n+ possible_cpus = mc->possible_cpu_arch_ids(ms);\n for (i = 0; i < smp_cpus; i++) {\n- pc_new_cpu(typename, possible_cpus->cpus[i].arch_id, &error_fatal);\n+ pc_new_cpu(ms->cpu_type, possible_cpus->cpus[i].arch_id, &error_fatal);\n }\n }\n \n@@ -2360,6 +2328,7 @@ static void pc_machine_class_init(ObjectClass *oc, void *data)\n hc->unplug_request = pc_machine_device_unplug_request_cb;\n hc->unplug = pc_machine_device_unplug_cb;\n nc->nmi_monitor_handler = x86_nmi;\n+ mc->default_cpu_type = TARGET_DEFAULT_CPU_TYPE;\n \n object_class_property_add(oc, PC_MACHINE_MEMHP_REGION_SIZE, \"int\",\n pc_machine_get_hotplug_memory_region_size, NULL,\ndiff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c\nindex 46dfd2c..a3f4e2a 100644\n--- a/hw/i386/pc_piix.c\n+++ b/hw/i386/pc_piix.c\n@@ -378,9 +378,6 @@ static void pc_compat_0_13(MachineState *machine)\n \n static void pc_init_isa(MachineState *machine)\n {\n- if (!machine->cpu_model) {\n- machine->cpu_model = \"486\";\n- }\n x86_cpu_change_kvm_default(\"kvm-pv-eoi\", NULL);\n enable_compat_apic_id_mode();\n pc_init1(machine, TYPE_I440FX_PCI_HOST_BRIDGE, TYPE_I440FX_PCI_DEVICE);\n@@ -1104,6 +1101,7 @@ static void isapc_machine_options(MachineClass *m)\n pcmc->gigabyte_align = false;\n pcmc->smbios_legacy_mode = true;\n pcmc->has_reserved_memory = false;\n+ m->default_cpu_type = X86_CPU_TYPE_NAME(\"486\");\n }\n \n DEFINE_PC_MACHINE(isapc, \"isapc\", pc_init_isa,\ndiff --git a/target/i386/cpu.c b/target/i386/cpu.c\nindex f81576d..a91b2b6 100644\n--- a/target/i386/cpu.c\n+++ b/target/i386/cpu.c\n@@ -705,9 +705,6 @@ void host_vendor_fms(char *vendor, int *family, int *model, int *stepping)\n \n /* CPU class name definitions: */\n \n-#define X86_CPU_TYPE_SUFFIX \"-\" TYPE_X86_CPU\n-#define X86_CPU_TYPE_NAME(name) (name X86_CPU_TYPE_SUFFIX)\n-\n /* Return type name for a given CPU model name\n * Caller is responsible for freeing the returned string.\n */\n","prefixes":["5/6"]}