{"id":807883,"url":"http://patchwork.ozlabs.org/api/1.0/patches/807883/?format=json","project":{"id":2,"url":"http://patchwork.ozlabs.org/api/1.0/projects/2/?format=json","name":"Linux PPC development","link_name":"linuxppc-dev","list_id":"linuxppc-dev.lists.ozlabs.org","list_email":"linuxppc-dev@lists.ozlabs.org","web_url":"https://github.com/linuxppc/wiki/wiki","scm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git","webscm_url":"https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git/"},"msgid":"<20170830194617.26621-2-clg@kaod.org>","date":"2017-08-30T19:46:10","name":"[v3,1/8] powerpc/xive: introduce a common routine xive_queue_page_alloc()","commit_ref":"994ea2f41999113d84c317da3ec1e10aa6469b3f","pull_url":null,"state":"accepted","archived":false,"hash":"248042815db290ec367da5a497fd809986b8fc6e","submitter":{"id":68548,"url":"http://patchwork.ozlabs.org/api/1.0/people/68548/?format=json","name":"Cédric Le Goater","email":"clg@kaod.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linuxppc-dev/patch/20170830194617.26621-2-clg@kaod.org/mbox/","series":[{"id":695,"url":"http://patchwork.ozlabs.org/api/1.0/series/695/?format=json","date":"2017-08-30T19:46:17","name":"guest exploitation of the XIVE interrupt controller","version":3,"mbox":"http://patchwork.ozlabs.org/series/695/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/807883/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","linuxppc-dev@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjGh50x0Xz9t16\n\tfor ;\n\tThu, 31 Aug 2017 06:05:09 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xjGh46SrjzDqXl\n\tfor ;\n\tThu, 31 Aug 2017 06:05:08 +1000 (AEST)","from 4.mo68.mail-out.ovh.net (4.mo68.mail-out.ovh.net\n\t[46.105.59.63])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xjGTx2NrYzDqRM\n\tfor ;\n\tThu, 31 Aug 2017 05:56:21 +1000 (AEST)","from player776.ha.ovh.net (b6.ovh.net [213.186.33.56])\n\tby mo68.mail-out.ovh.net (Postfix) with ESMTP id B87CE74ECA\n\tfor ;\n\tWed, 30 Aug 2017 21:46:39 +0200 (CEST)","from zorba.kaod.org.com (LFbn-1-2231-173.w90-76.abo.wanadoo.fr\n\t[90.76.52.173]) (Authenticated sender: clg@kaod.org)\n\tby player776.ha.ovh.net (Postfix) with ESMTPSA id 8B826400077;\n\tWed, 30 Aug 2017 21:46:33 +0200 (CEST)"],"X-Greylist":"delayed 578 seconds by postgrey-1.36 at bilbo;\n\tThu, 31 Aug 2017 05:56:21 AEST","From":"=?utf-8?q?C=C3=A9dric_Le_Goater?= ","To":"linuxppc-dev@lists.ozlabs.org","Subject":"[PATCH v3 1/8] powerpc/xive: introduce a common routine\n\txive_queue_page_alloc()","Date":"Wed, 30 Aug 2017 21:46:10 +0200","Message-Id":"<20170830194617.26621-2-clg@kaod.org>","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170830194617.26621-1-clg@kaod.org>","References":"<20170830194617.26621-1-clg@kaod.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit","X-Ovh-Tracer-Id":"1593992794812746685","X-VR-SPAMSTATE":"OK","X-VR-SPAMSCORE":"-100","X-VR-SPAMCAUSE":"gggruggvucftvghtrhhoucdtuddrfeelledrudeigddugedtucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm","X-BeenThere":"linuxppc-dev@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Linux on PowerPC Developers Mail List\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"David Gibson , Paul Mackerras\n\t, =?utf-8?q?C=C3=A9dric_Le_Goater?= ","Errors-To":"linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org","Sender":"\"Linuxppc-dev\"\n\t"},"content":"This routine will be used in the spapr backend. Also introduce a short\nxive_alloc_order() helper.\n\nSigned-off-by: Cédric Le Goater \nReviewed-by: David Gibson \n---\n arch/powerpc/sysdev/xive/common.c | 16 ++++++++++++++++\n arch/powerpc/sysdev/xive/native.c | 16 +++++-----------\n arch/powerpc/sysdev/xive/xive-internal.h | 6 ++++++\n 3 files changed, 27 insertions(+), 11 deletions(-)","diff":"diff --git a/arch/powerpc/sysdev/xive/common.c b/arch/powerpc/sysdev/xive/common.c\nindex 6e0c9dee724f..26999ceae20e 100644\n--- a/arch/powerpc/sysdev/xive/common.c\n+++ b/arch/powerpc/sysdev/xive/common.c\n@@ -1424,6 +1424,22 @@ bool xive_core_init(const struct xive_ops *ops, void __iomem *area, u32 offset,\n \treturn true;\n }\n \n+__be32 *xive_queue_page_alloc(unsigned int cpu, u32 queue_shift)\n+{\n+\tunsigned int alloc_order;\n+\tstruct page *pages;\n+\t__be32 *qpage;\n+\n+\talloc_order = xive_alloc_order(queue_shift);\n+\tpages = alloc_pages_node(cpu_to_node(cpu), GFP_KERNEL, alloc_order);\n+\tif (!pages)\n+\t\treturn ERR_PTR(-ENOMEM);\n+\tqpage = (__be32 *)page_address(pages);\n+\tmemset(qpage, 0, 1 << queue_shift);\n+\n+\treturn qpage;\n+}\n+\n static int __init xive_off(char *arg)\n {\n \txive_cmdline_disabled = true;\ndiff --git a/arch/powerpc/sysdev/xive/native.c b/arch/powerpc/sysdev/xive/native.c\nindex 0f95476b01f6..ef92a83090e1 100644\n--- a/arch/powerpc/sysdev/xive/native.c\n+++ b/arch/powerpc/sysdev/xive/native.c\n@@ -202,17 +202,12 @@ EXPORT_SYMBOL_GPL(xive_native_disable_queue);\n static int xive_native_setup_queue(unsigned int cpu, struct xive_cpu *xc, u8 prio)\n {\n \tstruct xive_q *q = &xc->queue[prio];\n-\tunsigned int alloc_order;\n-\tstruct page *pages;\n \t__be32 *qpage;\n \n-\talloc_order = (xive_queue_shift > PAGE_SHIFT) ?\n-\t\t(xive_queue_shift - PAGE_SHIFT) : 0;\n-\tpages = alloc_pages_node(cpu_to_node(cpu), GFP_KERNEL, alloc_order);\n-\tif (!pages)\n-\t\treturn -ENOMEM;\n-\tqpage = (__be32 *)page_address(pages);\n-\tmemset(qpage, 0, 1 << xive_queue_shift);\n+\tqpage = xive_queue_page_alloc(cpu, xive_queue_shift);\n+\tif (IS_ERR(qpage))\n+\t\treturn PTR_ERR(qpage);\n+\n \treturn xive_native_configure_queue(get_hard_smp_processor_id(cpu),\n \t\t\t\t\t q, prio, qpage, xive_queue_shift, false);\n }\n@@ -227,8 +222,7 @@ static void xive_native_cleanup_queue(unsigned int cpu, struct xive_cpu *xc, u8\n \t * from an IPI and iounmap isn't safe\n \t */\n \t__xive_native_disable_queue(get_hard_smp_processor_id(cpu), q, prio);\n-\talloc_order = (xive_queue_shift > PAGE_SHIFT) ?\n-\t\t(xive_queue_shift - PAGE_SHIFT) : 0;\n+\talloc_order = xive_alloc_order(xive_queue_shift);\n \tfree_pages((unsigned long)q->qpage, alloc_order);\n \tq->qpage = NULL;\n }\ndiff --git a/arch/powerpc/sysdev/xive/xive-internal.h b/arch/powerpc/sysdev/xive/xive-internal.h\nindex d07ef2d29caf..dd1e2022cce4 100644\n--- a/arch/powerpc/sysdev/xive/xive-internal.h\n+++ b/arch/powerpc/sysdev/xive/xive-internal.h\n@@ -56,6 +56,12 @@ struct xive_ops {\n \n bool xive_core_init(const struct xive_ops *ops, void __iomem *area, u32 offset,\n \t\t u8 max_prio);\n+__be32 *xive_queue_page_alloc(unsigned int cpu, u32 queue_shift);\n+\n+static inline u32 xive_alloc_order(u32 queue_shift)\n+{\n+\treturn (queue_shift > PAGE_SHIFT) ? (queue_shift - PAGE_SHIFT) : 0;\n+}\n \n extern bool xive_cmdline_disabled;\n \n","prefixes":["v3","1/8"]}