{"id":807710,"url":"http://patchwork.ozlabs.org/api/1.0/patches/807710/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20170830163609.50260-9-pasic@linux.vnet.ibm.com>","date":"2017-08-30T16:36:08","name":"[8/9] s390x: refactor error handling for MSCH handler","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"df725a3325da99db5e54558dd088a35ecb648af9","submitter":{"id":68297,"url":"http://patchwork.ozlabs.org/api/1.0/people/68297/?format=json","name":"Halil Pasic","email":"pasic@linux.vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170830163609.50260-9-pasic@linux.vnet.ibm.com/mbox/","series":[{"id":648,"url":"http://patchwork.ozlabs.org/api/1.0/series/648/?format=json","date":"2017-08-30T16:36:02","name":"","version":1,"mbox":"http://patchwork.ozlabs.org/series/648/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/807710/checks/","tags":{},"headers":{"Return-Path":"<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; helo=lists.gnu.org;\n\tenvelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n\treceiver=<UNKNOWN>)","Received":["from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11])\n\t(using TLSv1 with cipher AES256-SHA (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xjB9F4k3kz9sNn\n\tfor <incoming@patchwork.ozlabs.org>;\n\tThu, 31 Aug 2017 02:41:37 +1000 (AEST)","from localhost ([::1]:51561 helo=lists.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.71) (envelope-from\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>)\n\tid 1dn63b-0002m3-FW\n\tfor incoming@patchwork.ozlabs.org; Wed, 30 Aug 2017 12:41:35 -0400","from eggs.gnu.org ([2001:4830:134:3::10]:50197)\n\tby lists.gnu.org with esmtp (Exim 4.71)\n\t(envelope-from <pasic@linux.vnet.ibm.com>) id 1dn5ym-0007I1-51\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 12:36:39 -0400","from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71)\n\t(envelope-from <pasic@linux.vnet.ibm.com>) id 1dn5yl-0006KT-20\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 12:36:36 -0400","from mx0b-001b2d01.pphosted.com ([148.163.158.5]:59972\n\thelo=mx0a-001b2d01.pphosted.com)\n\tby eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32)\n\t(Exim 4.71) (envelope-from <pasic@linux.vnet.ibm.com>)\n\tid 1dn5yk-0006K7-Rp\n\tfor qemu-devel@nongnu.org; Wed, 30 Aug 2017 12:36:34 -0400","from pps.filterd (m0098414.ppops.net [127.0.0.1])\n\tby mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7UGTAGC111723\n\tfor <qemu-devel@nongnu.org>; Wed, 30 Aug 2017 12:36:34 -0400","from e06smtp15.uk.ibm.com (e06smtp15.uk.ibm.com [195.75.94.111])\n\tby mx0b-001b2d01.pphosted.com with ESMTP id 2cnx1vp5qh-1\n\t(version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT)\n\tfor <qemu-devel@nongnu.org>; Wed, 30 Aug 2017 12:36:34 -0400","from localhost\n\tby e06smtp15.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use\n\tOnly! Violators will be prosecuted\n\tfor <qemu-devel@nongnu.org> from <pasic@linux.vnet.ibm.com>;\n\tWed, 30 Aug 2017 17:36:32 +0100","from b06cxnps4075.portsmouth.uk.ibm.com (9.149.109.197)\n\tby e06smtp15.uk.ibm.com (192.168.101.145) with IBM ESMTP SMTP\n\tGateway: Authorized Use Only! Violators will be prosecuted; \n\tWed, 30 Aug 2017 17:36:30 +0100","from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com\n\t[9.149.105.232])\n\tby b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with\n\tESMTP id v7UGaTLn9044152; Wed, 30 Aug 2017 16:36:29 GMT","from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1])\n\tby IMSVA (Postfix) with ESMTP id 758C45203F;\n\tWed, 30 Aug 2017 16:31:56 +0100 (BST)","from tuxmaker.boeblingen.de.ibm.com (unknown [9.152.85.9])\n\tby d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTPS id 47DC452041; \n\tWed, 30 Aug 2017 16:31:56 +0100 (BST)"],"From":"Halil Pasic <pasic@linux.vnet.ibm.com>","To":"Cornelia Huck <cohuck@redhat.com>","Date":"Wed, 30 Aug 2017 18:36:08 +0200","X-Mailer":"git-send-email 2.13.5","In-Reply-To":"<20170830163609.50260-1-pasic@linux.vnet.ibm.com>","References":"<20170830163609.50260-1-pasic@linux.vnet.ibm.com>","X-TM-AS-GCONF":"00","x-cbid":"17083016-0020-0000-0000-000003B26EAF","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17083016-0021-0000-0000-00004242C0A6","Message-Id":"<20170830163609.50260-9-pasic@linux.vnet.ibm.com>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-30_07:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0\n\tmalwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam\n\tadjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1708300251","X-detected-operating-system":"by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy]","X-Received-From":"148.163.158.5","Subject":"[Qemu-devel] [PATCH 8/9] s390x: refactor error handling for MSCH\n\thandler","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"<qemu-devel.nongnu.org>","List-Unsubscribe":"<https://lists.nongnu.org/mailman/options/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>","List-Archive":"<http://lists.nongnu.org/archive/html/qemu-devel/>","List-Post":"<mailto:qemu-devel@nongnu.org>","List-Help":"<mailto:qemu-devel-request@nongnu.org?subject=help>","List-Subscribe":"<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n\t<mailto:qemu-devel-request@nongnu.org?subject=subscribe>","Cc":"Dong Jia Shi <bjsdjshi@linux.vnet.ibm.com>,\n\tHalil Pasic <pasic@linux.vnet.ibm.com>,\n\tPierre Morel <pmorel@linux.vnet.ibm.com>, qemu-devel@nongnu.org","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>"},"content":"Simplify the error handling of the MSCH handler avoiding arbitrary and\ncryptic error codes being mapped to what a subchannel is supposed to do.\nLet the code detecting the condition tell how it's to be handled in a\nless ambiguous way.\n\nSigned-off-by: Halil Pasic <pasic@linux.vnet.ibm.com>\nReviewed-by: Pierre Morel<pmorel@linux.vnet.ibm.com>\n---\n hw/s390x/css.c         | 20 +++++++-------------\n include/hw/s390x/css.h |  2 +-\n target/s390x/ioinst.c  | 27 +++++++++------------------\n 3 files changed, 17 insertions(+), 32 deletions(-)","diff":"diff --git a/hw/s390x/css.c b/hw/s390x/css.c\nindex eff1b91a8c..931a097d6a 100644\n--- a/hw/s390x/css.c\n+++ b/hw/s390x/css.c\n@@ -1182,28 +1182,27 @@ static void copy_schib_from_guest(SCHIB *dest, const SCHIB *src)\n     }\n }\n \n-int css_do_msch(SubchDev *sch, const SCHIB *orig_schib)\n+void css_do_msch(SubchDev *sch, const SCHIB *orig_schib)\n {\n     SCSW *s = &sch->curr_status.scsw;\n     PMCW *p = &sch->curr_status.pmcw;\n     uint16_t oldflags;\n-    int ret;\n     SCHIB schib;\n \n     if (!(sch->curr_status.pmcw.flags & PMCW_FLAGS_MASK_DNV)) {\n-        ret = 0;\n-        goto out;\n+        sch->iret.cc = 0;\n+        return;\n     }\n \n     if (s->ctrl & SCSW_STCTL_STATUS_PEND) {\n-        ret = -EINPROGRESS;\n-        goto out;\n+        sch->iret.cc = 1;\n+        return;\n     }\n \n     if (s->ctrl &\n         (SCSW_FCTL_START_FUNC|SCSW_FCTL_HALT_FUNC|SCSW_FCTL_CLEAR_FUNC)) {\n-        ret = -EBUSY;\n-        goto out;\n+        sch->iret.cc = 2;\n+        return;\n     }\n \n     copy_schib_from_guest(&schib, orig_schib);\n@@ -1230,11 +1229,6 @@ int css_do_msch(SubchDev *sch, const SCHIB *orig_schib)\n         && (p->flags & PMCW_FLAGS_MASK_ENA) == 0) {\n         sch->disable_cb(sch);\n     }\n-\n-    ret = 0;\n-\n-out:\n-    return ret;\n }\n \n void css_do_xsch(SubchDev *sch)\ndiff --git a/include/hw/s390x/css.h b/include/hw/s390x/css.h\nindex d8d949da4f..37ac36b014 100644\n--- a/include/hw/s390x/css.h\n+++ b/include/hw/s390x/css.h\n@@ -203,7 +203,7 @@ bool css_subch_visible(SubchDev *sch);\n void css_conditional_io_interrupt(SubchDev *sch);\n int css_do_stsch(SubchDev *sch, SCHIB *schib);\n bool css_schid_final(int m, uint8_t cssid, uint8_t ssid, uint16_t schid);\n-int css_do_msch(SubchDev *sch, const SCHIB *schib);\n+void css_do_msch(SubchDev *sch, const SCHIB *schib);\n void css_do_xsch(SubchDev *sch);\n void css_do_csch(SubchDev *sch);\n void css_do_hsch(SubchDev *sch);\ndiff --git a/target/s390x/ioinst.c b/target/s390x/ioinst.c\nindex e91788d586..a286495219 100644\n--- a/target/s390x/ioinst.c\n+++ b/target/s390x/ioinst.c\n@@ -128,8 +128,6 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb)\n     SubchDev *sch;\n     SCHIB schib;\n     uint64_t addr;\n-    int ret = -ENODEV;\n-    int cc;\n     CPUS390XState *env = &cpu->env;\n     uint8_t ar;\n \n@@ -148,24 +146,17 @@ void ioinst_handle_msch(S390CPU *cpu, uint64_t reg1, uint32_t ipb)\n     }\n     trace_ioinst_sch_id(\"msch\", cssid, ssid, schid);\n     sch = css_find_subch(m, cssid, ssid, schid);\n-    if (sch && css_subch_visible(sch)) {\n-        ret = css_do_msch(sch, &schib);\n+    if (!sch || !css_subch_visible(sch)) {\n+        setcc(cpu, 3);\n+        return;\n     }\n-    switch (ret) {\n-    case -ENODEV:\n-        cc = 3;\n-        break;\n-    case -EBUSY:\n-        cc = 2;\n-        break;\n-    case 0:\n-        cc = 0;\n-        break;\n-    default:\n-        cc = 1;\n-        break;\n+    css_subch_clear_iret(sch);\n+    css_do_msch(sch, &schib);\n+    if (sch->iret.pgm_chk) {\n+        program_interrupt(&cpu->env, sch->iret.irq_code, 4);\n+        return;\n     }\n-    setcc(cpu, cc);\n+    setcc(cpu, sch->iret.cc);\n }\n \n static void copy_orb_from_guest(ORB *dest, const ORB *src)\n","prefixes":["8/9"]}