{"id":807690,"url":"http://patchwork.ozlabs.org/api/1.0/patches/807690/?format=json","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.0/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<1504108529-31727-2-git-send-email-fabrice.gasnier@st.com>","date":"2017-08-30T15:55:27","name":"[v2,1/3] dt-bindings: regulator: Add STM32 Voltage Reference Buffer","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"feb61da3551920435ef413220ad5db2d3d04e2a0","submitter":{"id":65902,"url":"http://patchwork.ozlabs.org/api/1.0/people/65902/?format=json","name":"Fabrice Gasnier","email":"fabrice.gasnier@st.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1504108529-31727-2-git-send-email-fabrice.gasnier@st.com/mbox/","series":[{"id":639,"url":"http://patchwork.ozlabs.org/api/1.0/series/639/?format=json","date":"2017-08-30T15:55:27","name":"Add support for STM32 vrefbuf regulator","version":2,"mbox":"http://patchwork.ozlabs.org/series/639/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/807690/checks/","tags":{},"headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xj98v3RWJz9sQl\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tThu, 31 Aug 2017 01:56:15 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751485AbdH3P4N (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tWed, 30 Aug 2017 11:56:13 -0400","from mx08-00178001.pphosted.com ([91.207.212.93]:40124 \"EHLO\n\tmx07-00178001.pphosted.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1751463AbdH3P4N (ORCPT\n\t<rfc822; devicetree@vger.kernel.org>); Wed, 30 Aug 2017 11:56:13 -0400","from pps.filterd (m0046661.ppops.net [127.0.0.1])\n\tby mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7UFskrX026008; Wed, 30 Aug 2017 17:55:34 +0200","from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx08-.pphosted.com with ESMTP id 2cnkgpw3u4-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tWed, 30 Aug 2017 17:55:34 +0200","from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2BA4C34;\n\tWed, 30 Aug 2017 15:55:34 +0000 (GMT)","from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 097DF2980;\n\tWed, 30 Aug 2017 15:55:34 +0000 (GMT)","from localhost (10.75.127.51) by SFHDAG5NODE3.st.com (10.75.127.15)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tWed, 30 Aug 2017 17:55:33 +0200"],"From":"Fabrice Gasnier <fabrice.gasnier@st.com>","To":"<broonie@kernel.org>, <lgirdwood@gmail.com>, <robh+dt@kernel.org>,\n\t<alexandre.torgue@st.com>","CC":"<mark.rutland@arm.com>, <mcoquelin.stm32@gmail.com>,\n\t<fabrice.gasnier@st.com>, <linux@armlinux.org.uk>,\n\t<devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, \n\t<linux-kernel@vger.kernel.org>","Subject":"[PATCH v2 1/3] dt-bindings: regulator: Add STM32 Voltage Reference\n\tBuffer","Date":"Wed, 30 Aug 2017 17:55:27 +0200","Message-ID":"<1504108529-31727-2-git-send-email-fabrice.gasnier@st.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1504108529-31727-1-git-send-email-fabrice.gasnier@st.com>","References":"<1504108529-31727-1-git-send-email-fabrice.gasnier@st.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-Originating-IP":"[10.75.127.51]","X-ClientProxiedBy":"SFHDAG7NODE2.st.com (10.75.127.20) To SFHDAG5NODE3.st.com\n\t(10.75.127.15)","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-30_07:, , signatures=0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"Document STM32 VREFBUF (voltage reference buffer) which can be used as\nvoltage reference for ADCs, DACs and external components.\n\nSigned-off-by: Fabrice Gasnier <fabrice.gasnier@st.com>\nAcked-by: Rob Herring <robh@kernel.org>\n---\n .../bindings/regulator/st,stm32-vrefbuf.txt          | 20 ++++++++++++++++++++\n 1 file changed, 20 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.txt","diff":"diff --git a/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.txt b/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.txt\nnew file mode 100644\nindex 0000000..3944ee3\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/regulator/st,stm32-vrefbuf.txt\n@@ -0,0 +1,20 @@\n+STM32 VREFBUF - Voltage reference buffer\n+\n+Some STM32 devices embed a voltage reference buffer which can be used as\n+voltage reference for ADCs, DACs and also as voltage reference for external\n+components through the dedicated VREF+ pin.\n+\n+Required properties:\n+- compatible:\t\tMust be \"st,stm32-vrefbuf\".\n+- reg:\t\t\tOffset and length of VREFBUF register set.\n+- clocks:\t\tMust contain an entry for peripheral clock.\n+\n+Example:\n+\tvrefbuf: regulator@58003C00 {\n+\t\tcompatible = \"st,stm32-vrefbuf\";\n+\t\treg = <0x58003C00 0x8>;\n+\t\tclocks = <&rcc VREF_CK>;\n+\t\tregulator-min-microvolt = <1500000>;\n+\t\tregulator-max-microvolt = <2500000>;\n+\t\tvdda-supply = <&vdda>;\n+\t};\n","prefixes":["v2","1/3"]}