{"id":807683,"url":"http://patchwork.ozlabs.org/api/1.0/patches/807683/?format=json","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.0/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20170830151953.30856-15-tony@atomide.com>","date":"2017-08-30T15:19:50","name":"[14/17] ARM: dts: Add missing gpu node and binding for omap4","commit_ref":null,"pull_url":null,"state":"changes-requested","archived":true,"hash":"c7d7939000ecf5dc7cb5d77ae154dde90844a2b9","submitter":{"id":365,"url":"http://patchwork.ozlabs.org/api/1.0/people/365/?format=json","name":"Tony Lindgren","email":"tony@atomide.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170830151953.30856-15-tony@atomide.com/mbox/","series":[{"id":635,"url":"http://patchwork.ozlabs.org/api/1.0/series/635/?format=json","date":"2017-08-30T15:19:36","name":"Fix missing device tree hwmods and IO ranges omap variants","version":1,"mbox":"http://patchwork.ozlabs.org/series/635/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/807683/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xj8MN3wrCz9t0F\n\tfor ;\n\tThu, 31 Aug 2017 01:20:16 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751676AbdH3PUO (ORCPT\n\t);\n\tWed, 30 Aug 2017 11:20:14 -0400","from muru.com ([72.249.23.125]:38860 \"EHLO muru.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751639AbdH3PUM (ORCPT );\n\tWed, 30 Aug 2017 11:20:12 -0400","from sampyla.muru.com (localhost [127.0.0.1])\n\tby muru.com (Postfix) with ESMTP id C0E798411;\n\tWed, 30 Aug 2017 15:20:33 +0000 (UTC)"],"From":"Tony Lindgren ","To":"linux-omap@vger.kernel.org","Cc":"=?utf-8?q?Beno=C3=AEt_Cousson?= ,\n\tdevicetree@vger.kernel.org, Mark Rutland , \n\tRob Herring , Tomi Valkeinen ","Subject":"[PATCH 14/17] ARM: dts: Add missing gpu node and binding for omap4","Date":"Wed, 30 Aug 2017 08:19:50 -0700","Message-Id":"<20170830151953.30856-15-tony@atomide.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170830151953.30856-1-tony@atomide.com>","References":"<20170830151953.30856-1-tony@atomide.com>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"On omap4 we're missing the PowerVR SGX GPU node with it's related\n\"ti,hwmods\" property that the SoC interconnect code needs.\n\nNote that this will only show up as a bug with \"doesn't have\nmpu register target base\" boot errors when the legacy platform\ndata is removed.\n\nCc: Mark Rutland \nCc: Rob Herring \nCc: Tomi Valkeinen \nSigned-off-by: Tony Lindgren \n---\n .../devicetree/bindings/gpu/ti-powervr-sgx.txt | 39 ++++++++++++++++++++++\n arch/arm/boot/dts/omap4.dtsi | 7 ++++\n 2 files changed, 46 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt","diff":"diff --git a/Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt b/Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt\nnew file mode 100644\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt\n@@ -0,0 +1,39 @@\n+Texas Instruments PowevVR SGX binding\n+\n+SGX can be used for graphics acceleration on Texas Instruments SoCs.\n+\n+Note that the SGX binding is currently only used by the SoC interconnect\n+code to idle the module on init and no open source driver is available\n+for SGX. The PowerVR model specific driver nodes should be child nodes\n+of this instance, and a clock binding may need to be added.\n+\n+Required properties:\n+\n+compatible: Shall be one of the following:\n+\t\t\"ti,omap3-sgx530\"\n+\t\t\"ti,am335-sgx530\"\n+\t\t\"ti,omap4-sgx540\"\n+\t\t\"ti,omap5-sgx544\"\n+\t\t\"ti,dra7-sgx544\"\n+\n+reg: Shall contain the device instance IO range\n+\n+interrupts: Shall contain the device instance interrupt\n+\n+\n+Optional properties:\n+\n+reg-names: Shall contain the IO range names if multiple IO\n+\t ranges are used by the SoC\n+\n+ti,hwmods: Shall contain the TI interconnect module name if needed\n+\t by the SoC\n+\n+\n+Example:\n+\tgpu: gpu@56000000 {\n+\t\tcompatible = \"ti,omap4-sgx540\";\n+\t\treg = <0x56000000 0x10000>;\n+\t\tinterrupts = ;\n+\t\tti,hwmods = \"gpu\";\n+\t};\ndiff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi\n--- a/arch/arm/boot/dts/omap4.dtsi\n+++ b/arch/arm/boot/dts/omap4.dtsi\n@@ -1111,6 +1111,13 @@\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n+\t\tgpu: gpu@56000000 {\n+\t\t\tcompatible = \"ti,omap4-sgx540\";\n+\t\t\treg = <0x56000000 0x10000>;\n+\t\t\tinterrupts = ;\n+\t\t\tti,hwmods = \"gpu\";\n+\t\t};\n+\n \t\tdss: dss@58000000 {\n \t\t\tcompatible = \"ti,omap4-dss\";\n \t\t\treg = <0x58000000 0x80>;\n","prefixes":["14/17"]}