{"id":807432,"url":"http://patchwork.ozlabs.org/api/1.0/patches/807432/?format=json","project":{"id":44,"url":"http://patchwork.ozlabs.org/api/1.0/projects/44/?format=json","name":"skiboot firmware development","link_name":"skiboot","list_id":"skiboot.lists.ozlabs.org","list_email":"skiboot@lists.ozlabs.org","web_url":"http://github.com/open-power/skiboot","scm_url":"http://github.com/open-power/skiboot","webscm_url":""},"msgid":"<20170830062011.15199-3-npiggin@gmail.com>","date":"2017-08-30T06:20:10","name":"[2/3] idle: disable stop*_lite POWER9 idle states for Mambo platform","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"06280d9fc575fcffd657343f0bc6573e17cc9e38","submitter":{"id":69518,"url":"http://patchwork.ozlabs.org/api/1.0/people/69518/?format=json","name":"Nicholas Piggin","email":"npiggin@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/skiboot/patch/20170830062011.15199-3-npiggin@gmail.com/mbox/","series":[{"id":532,"url":"http://patchwork.ozlabs.org/api/1.0/series/532/?format=json","date":"2017-08-30T06:20:08","name":"misc idle fixes","version":1,"mbox":"http://patchwork.ozlabs.org/series/532/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/807432/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["incoming@patchwork.ozlabs.org","skiboot@lists.ozlabs.org"],"Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","skiboot@lists.ozlabs.org"],"Received":["from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\t(using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xhwPY3CBgz9sNc\n\tfor ;\n\tWed, 30 Aug 2017 16:21:21 +1000 (AEST)","from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3])\n\tby lists.ozlabs.org (Postfix) with ESMTP id 3xhwPY20QszDqJ8\n\tfor ;\n\tWed, 30 Aug 2017 16:21:21 +1000 (AEST)","from mail-pf0-x242.google.com (mail-pf0-x242.google.com\n\t[IPv6:2607:f8b0:400e:c00::242])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128\n\tbits)) (No client certificate requested)\n\tby lists.ozlabs.org (Postfix) with ESMTPS id 3xhwNw60bCzDqHx\n\tfor ; Wed, 30 Aug 2017 16:20:48 +1000 (AEST)","by mail-pf0-x242.google.com with SMTP id k3so3750782pfc.3\n\tfor ; Tue, 29 Aug 2017 23:20:48 -0700 (PDT)","from roar.au.ibm.com (203-219-56-202.tpgi.com.au. [203.219.56.202])\n\tby smtp.gmail.com with ESMTPSA id\n\t82sm8266783pgb.86.2017.08.29.23.20.43\n\t(version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128);\n\tTue, 29 Aug 2017 23:20:45 -0700 (PDT)"],"Authentication-Results":["ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"PdUey74v\"; dkim-atps=neutral","lists.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"PdUey74v\"; dkim-atps=neutral","lists.ozlabs.org; dkim=pass (2048-bit key;\n\tunprotected) header.d=gmail.com header.i=@gmail.com\n\theader.b=\"PdUey74v\"; dkim-atps=neutral"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025;\n\th=from:to:cc:subject:date:message-id:in-reply-to:references;\n\tbh=G1paMLGJDkHa1SY5TfirBB2LXp2Fo/el4ovseAdubq0=;\n\tb=PdUey74vjyufQSXiUVXcklSB/xoZMs7XxHwnsrIpvvucYrYoOrq/AAdor376CDor9e\n\tZG01q3CHNP2wgBF/lXVo1Xu01utHnQKOcRU11S2lBoICkaOR4rKKfUjvBzWpXZH9/gNN\n\tb2gqo0Efl/plP/3Uyq/GEQT3p/j4CiNB/4YapXvZUWoq5v/WdhdxfrfYvV6CLgW5b25f\n\t8q46T029woBx9bzLD/qmn4L/aBCnif+K5Tzr3ZYCHmajFd8A5F48G8LkcdrZMIOxAOiz\n\tTXPXqwknNNcxpiIqP9Gnrr5YaDQ8/gy5w8FE0vBD8K/xFFS+xZQwbAjGFJcxH1h2MUBw\n\taKWg==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to\n\t:references;\n\tbh=G1paMLGJDkHa1SY5TfirBB2LXp2Fo/el4ovseAdubq0=;\n\tb=MO5FdBDum0kxV0btvYJoOY2+hwwcqZM+UyIxH8dbdaTjXjojnonnigKAmzNdT2u52h\n\t/NwQy1YH4IvB09fZ00HBt8WRC7mDsBTmiO2XHfiyZsa9LyV+sCP9OM2ZdV/cvMY5jouX\n\ta9dYoUx35sEhqO/Sue+PJ2X+M7ByZywS4nPGxqmGnNqCAUpQ5KDV2GSSEAh9S4LoWfos\n\tEUN4n5oLJzjIsSG6PHuBeecmEJOY/3MK0Y57CZY6cqz9boc8jB+JkXBQ5npFOY8lFvbb\n\thfbJvvwS9AHTz0ovQ6xhEj8TaBI0Ik18jHnqpFIZ2FdZ8aGpU1jyc9jsN8ryuDioVo93\n\te78A==","X-Gm-Message-State":"AHYfb5jkFNUFNqL4JYdrlTvpxQiwv6Thnbmwp/Txfn5NqAE1jHeUl1O5\n\t74ww+NOWaUP0Nc8p","X-Received":"by 10.99.140.14 with SMTP id m14mr567848pgd.106.1504074046600;\n\tTue, 29 Aug 2017 23:20:46 -0700 (PDT)","From":"Nicholas Piggin ","To":"skiboot@lists.ozlabs.org","Date":"Wed, 30 Aug 2017 16:20:10 +1000","Message-Id":"<20170830062011.15199-3-npiggin@gmail.com>","X-Mailer":"git-send-email 2.13.3","In-Reply-To":"<20170830062011.15199-1-npiggin@gmail.com>","References":"<20170830062011.15199-1-npiggin@gmail.com>","Subject":"[Skiboot] [PATCH 2/3] idle: disable stop*_lite POWER9 idle states\n\tfor Mambo platform","X-BeenThere":"skiboot@lists.ozlabs.org","X-Mailman-Version":"2.1.23","Precedence":"list","List-Id":"Mailing list for skiboot development ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"\"Gautham R . Shenoy\" ","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org","Sender":"\"Skiboot\"\n\t"},"content":"Mambo prior to Mambo.7.8.21 had a bug where the stop idle instruction\nwith PSSCR[ESL]=PSSCR[EC]=0 would resume with MSR set as though it had\ntaken a system reset interrupt.\n\nLinux currently executes this instruction with MSR already set that\nway, so the problem went unnoticed. A proposed patch to Linux changes\nthat, and causes the idle code to crash. Work around this by disabling\nlite stop states for the mambo platform for now.\n\nSigned-off-by: Nicholas Piggin \n---\n hw/slw.c | 111 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-\n 1 file changed, 110 insertions(+), 1 deletion(-)","diff":"diff --git a/hw/slw.c b/hw/slw.c\nindex 0720545c..d8829a6b 100644\n--- a/hw/slw.c\n+++ b/hw/slw.c\n@@ -649,6 +649,112 @@ static struct cpu_idle_states power9_cpu_idle_states[] = {\n \n };\n \n+/*\n+ * Prior to Mambo.7.8.21, mambo did set the MSR correctly for lite stop\n+ * states, so disable them for now.\n+ */\n+static struct cpu_idle_states power9_mambo_cpu_idle_states[] = {\n+\t{\n+\t\t.name = \"stop0\",\n+\t\t.latency_ns = 2000,\n+\t\t.residency_ns = 20000,\n+\t\t.flags = 0*OPAL_PM_DEC_STOP \\\n+\t\t | 0*OPAL_PM_TIMEBASE_STOP \\\n+\t\t | 1*OPAL_PM_LOSE_USER_CONTEXT \\\n+\t\t | 0*OPAL_PM_LOSE_HYP_CONTEXT \\\n+\t\t | 0*OPAL_PM_LOSE_FULL_CONTEXT \\\n+\t\t | 1*OPAL_PM_STOP_INST_FAST,\n+\t\t.pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(0) \\\n+\t\t\t\t | OPAL_PM_PSSCR_MTL(3) \\\n+\t\t\t\t | OPAL_PM_PSSCR_TR(3) \\\n+\t\t\t\t | OPAL_PM_PSSCR_ESL \\\n+\t\t\t\t | OPAL_PM_PSSCR_EC,\n+\t\t.pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },\n+\t{\n+\t\t.name = \"stop1\",\n+\t\t.latency_ns = 5000,\n+\t\t.residency_ns = 50000,\n+\t\t.flags = 0*OPAL_PM_DEC_STOP \\\n+\t\t | 0*OPAL_PM_TIMEBASE_STOP \\\n+\t\t | 1*OPAL_PM_LOSE_USER_CONTEXT \\\n+\t\t | 0*OPAL_PM_LOSE_HYP_CONTEXT \\\n+\t\t | 0*OPAL_PM_LOSE_FULL_CONTEXT \\\n+\t\t | 1*OPAL_PM_STOP_INST_FAST,\n+\t\t.pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(1) \\\n+\t\t\t\t | OPAL_PM_PSSCR_MTL(3) \\\n+\t\t\t\t | OPAL_PM_PSSCR_TR(3) \\\n+\t\t\t\t | OPAL_PM_PSSCR_ESL \\\n+\t\t\t\t | OPAL_PM_PSSCR_EC,\n+\t\t.pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },\n+\t{\n+\t\t.name = \"stop2\",\n+\t\t.latency_ns = 10000,\n+\t\t.residency_ns = 100000,\n+\t\t.flags = 0*OPAL_PM_DEC_STOP \\\n+\t\t | 0*OPAL_PM_TIMEBASE_STOP \\\n+\t\t | 1*OPAL_PM_LOSE_USER_CONTEXT \\\n+\t\t | 0*OPAL_PM_LOSE_HYP_CONTEXT \\\n+\t\t | 0*OPAL_PM_LOSE_FULL_CONTEXT \\\n+\t\t | 1*OPAL_PM_STOP_INST_FAST,\n+\t\t.pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(2) \\\n+\t\t\t\t | OPAL_PM_PSSCR_MTL(3) \\\n+\t\t\t\t | OPAL_PM_PSSCR_TR(3) \\\n+\t\t\t\t | OPAL_PM_PSSCR_ESL \\\n+\t\t\t\t | OPAL_PM_PSSCR_EC,\n+\t\t.pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },\n+\t{\n+\t\t.name = \"stop4\",\n+\t\t.latency_ns = 100000,\n+\t\t.residency_ns = 1000000,\n+\t\t.flags = 1*OPAL_PM_DEC_STOP \\\n+\t\t | 1*OPAL_PM_TIMEBASE_STOP \\\n+\t\t | 1*OPAL_PM_LOSE_USER_CONTEXT \\\n+\t\t | 1*OPAL_PM_LOSE_HYP_CONTEXT \\\n+\t\t | 1*OPAL_PM_LOSE_FULL_CONTEXT \\\n+\t\t | 1*OPAL_PM_STOP_INST_DEEP,\n+\t\t.pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(4) \\\n+\t\t\t\t | OPAL_PM_PSSCR_MTL(7) \\\n+\t\t\t\t | OPAL_PM_PSSCR_TR(3) \\\n+\t\t\t\t | OPAL_PM_PSSCR_ESL \\\n+\t\t\t\t | OPAL_PM_PSSCR_EC,\n+\t\t.pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },\n+\n+\t{\n+\t\t.name = \"stop8\",\n+\t\t.latency_ns = 2000000,\n+\t\t.residency_ns = 20000000,\n+\t\t.flags = 1*OPAL_PM_DEC_STOP \\\n+\t\t | 1*OPAL_PM_TIMEBASE_STOP \\\n+\t\t | 1*OPAL_PM_LOSE_USER_CONTEXT \\\n+\t\t | 1*OPAL_PM_LOSE_HYP_CONTEXT \\\n+\t\t | 1*OPAL_PM_LOSE_FULL_CONTEXT \\\n+\t\t | 1*OPAL_PM_STOP_INST_DEEP,\n+\t\t.pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(8) \\\n+\t\t\t\t | OPAL_PM_PSSCR_MTL(11) \\\n+\t\t\t\t | OPAL_PM_PSSCR_TR(3) \\\n+\t\t\t\t | OPAL_PM_PSSCR_ESL \\\n+\t\t\t\t | OPAL_PM_PSSCR_EC,\n+\t\t.pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },\n+\n+\t{\n+\t\t.name = \"stop11\",\n+\t\t.latency_ns = 10000000,\n+\t\t.residency_ns = 100000000,\n+\t\t.flags = 1*OPAL_PM_DEC_STOP \\\n+\t\t | 1*OPAL_PM_TIMEBASE_STOP \\\n+\t\t | 1*OPAL_PM_LOSE_USER_CONTEXT \\\n+\t\t | 1*OPAL_PM_LOSE_HYP_CONTEXT \\\n+\t\t | 1*OPAL_PM_LOSE_FULL_CONTEXT \\\n+\t\t | 1*OPAL_PM_STOP_INST_DEEP,\n+\t\t.pm_ctrl_reg_val = OPAL_PM_PSSCR_RL(11) \\\n+\t\t\t\t | OPAL_PM_PSSCR_MTL(11) \\\n+\t\t\t\t | OPAL_PM_PSSCR_TR(3) \\\n+\t\t\t\t | OPAL_PM_PSSCR_ESL \\\n+\t\t\t\t | OPAL_PM_PSSCR_EC,\n+\t\t.pm_ctrl_reg_mask = OPAL_PM_PSSCR_MASK },\n+\n+};\n+\n /* Idle states supported for P9 DD1 */\n static struct cpu_idle_states power9_ndd1_cpu_idle_states[] = {\n \t{\n@@ -750,7 +856,10 @@ void add_cpu_idle_state_properties(void)\n \tassert(chip);\n \tif (chip->type == PROC_CHIP_P9_NIMBUS ||\n \t chip->type == PROC_CHIP_P9_CUMULUS) {\n-\t\tif ((chip->ec_level == 0x10) &&\n+\t\tif (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS) {\n+\t\t\tstates = power9_mambo_cpu_idle_states;\n+\t\t\tnr_states = ARRAY_SIZE(power9_mambo_cpu_idle_states);\n+\t\t} else if ((chip->ec_level == 0x10) &&\n \t\t (chip->type == PROC_CHIP_P9_NIMBUS)) {\n \t\t\tstates = power9_ndd1_cpu_idle_states;\n \t\t\tnr_states = ARRAY_SIZE(power9_ndd1_cpu_idle_states);\n","prefixes":["2/3"]}