{"id":807278,"url":"http://patchwork.ozlabs.org/api/1.0/patches/807278/?format=json","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.0/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20170829201601.64312-12-sjg@chromium.org>","date":"2017-08-29T20:15:56","name":"[U-Boot,v2,11/16] dtoc: Rename the phandle struct","commit_ref":"0d15463c0537806f70ea2359e32e4deb8c4766c2","pull_url":null,"state":"accepted","archived":false,"hash":"d62130b39f0379a98d4f40e18572d427cf744620","submitter":{"id":6170,"url":"http://patchwork.ozlabs.org/api/1.0/people/6170/?format=json","name":"Simon Glass","email":"sjg@chromium.org"},"delegate":{"id":3184,"url":"http://patchwork.ozlabs.org/api/1.0/users/3184/?format=json","username":"sjg","first_name":"Simon","last_name":"Glass","email":"sjg@chromium.org"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20170829201601.64312-12-sjg@chromium.org/mbox/","series":[{"id":462,"url":"http://patchwork.ozlabs.org/api/1.0/series/462/?format=json","date":"2017-08-29T20:15:45","name":"dtoc: Add support for 64-bit addresses","version":2,"mbox":"http://patchwork.ozlabs.org/series/462/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/807278/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"Rather than naming the phandle struct according to the number of cells it\nuses (e.g. struct phandle_2_cell) name it according to the number of\narguments it has (e.g. struct phandle_1_arg). This is a more intuitive\nnaming.\n\nSigned-off-by: Simon Glass \n---\n\nChanges in v2: None\n\n doc/driver-model/of-plat.txt | 2 +-\n drivers/clk/clk-uclass.c | 2 +-\n include/clk.h | 4 ++--\n include/dt-structs.h | 7 ++++++-\n tools/dtoc/dtb_platdata.py | 3 ++-\n tools/dtoc/test_dtoc.py | 2 +-\n 6 files changed, 13 insertions(+), 7 deletions(-)","diff":"diff --git a/doc/driver-model/of-plat.txt b/doc/driver-model/of-plat.txt\nindex 3ed8c759d6..732bc34f06 100644\n--- a/doc/driver-model/of-plat.txt\n+++ b/doc/driver-model/of-plat.txt\n@@ -111,7 +111,7 @@ struct dtd_rockchip_rk3288_dw_mshc {\n bool cap_sd_highspeed;\n fdt32_t card_detect_delay;\n fdt32_t clock_freq_min_max[2];\n- struct phandle_2_cell clocks[4];\n+ struct phandle_1_arg clocks[4];\n bool disable_wp;\n fdt32_t fifo_depth;\n fdt32_t interrupts[3];\ndiff --git a/drivers/clk/clk-uclass.c b/drivers/clk/clk-uclass.c\nindex e68d9279b9..8b40326efa 100644\n--- a/drivers/clk/clk-uclass.c\n+++ b/drivers/clk/clk-uclass.c\n@@ -23,7 +23,7 @@ static inline struct clk_ops *clk_dev_ops(struct udevice *dev)\n #if CONFIG_IS_ENABLED(OF_CONTROL)\n # if CONFIG_IS_ENABLED(OF_PLATDATA)\n int clk_get_by_index_platdata(struct udevice *dev, int index,\n-\t\t\t struct phandle_2_cell *cells, struct clk *clk)\n+\t\t\t struct phandle_1_arg *cells, struct clk *clk)\n {\n \tint ret;\n \ndiff --git a/include/clk.h b/include/clk.h\nindex c5988f78a8..e7ce3e8576 100644\n--- a/include/clk.h\n+++ b/include/clk.h\n@@ -61,9 +61,9 @@ struct clk {\n };\n \n #if CONFIG_IS_ENABLED(OF_CONTROL) && CONFIG_IS_ENABLED(CLK)\n-struct phandle_2_cell;\n+struct phandle_1_arg;\n int clk_get_by_index_platdata(struct udevice *dev, int index,\n-\t\t\t struct phandle_2_cell *cells, struct clk *clk);\n+\t\t\t struct phandle_1_arg *cells, struct clk *clk);\n \n /**\n * clock_get_by_index - Get/request a clock by integer index.\ndiff --git a/include/dt-structs.h b/include/dt-structs.h\nindex 0732c442ff..2ed997115a 100644\n--- a/include/dt-structs.h\n+++ b/include/dt-structs.h\n@@ -9,7 +9,12 @@\n \n /* These structures may only be used in SPL */\n #if CONFIG_IS_ENABLED(OF_PLATDATA)\n-struct phandle_2_cell {\n+struct phandle_0_arg {\n+\tconst void *node;\n+\tint id[0];\n+};\n+\n+struct phandle_1_arg {\n \tconst void *node;\n \tint id;\n };\ndiff --git a/tools/dtoc/dtb_platdata.py b/tools/dtoc/dtb_platdata.py\nindex 001bc4ea66..0234f71b76 100644\n--- a/tools/dtoc/dtb_platdata.py\n+++ b/tools/dtoc/dtb_platdata.py\n@@ -419,7 +419,8 @@ class DtbPlatdata(object):\n info = self.get_phandle_argc(prop, structs[name])\n if info:\n # For phandles, include a reference to the target\n- self.out('\\t%s%s[%d]' % (tab_to(2, 'struct phandle_2_cell'),\n+ struct_name = 'struct phandle_%d_arg' % info.max_args\n+ self.out('\\t%s%s[%d]' % (tab_to(2, struct_name),\n conv_name_to_c(prop.name),\n len(prop.value) / 2))\n else:\ndiff --git a/tools/dtoc/test_dtoc.py b/tools/dtoc/test_dtoc.py\nindex 62460acb7c..23c4439ed9 100644\n--- a/tools/dtoc/test_dtoc.py\n+++ b/tools/dtoc/test_dtoc.py\n@@ -228,7 +228,7 @@ U_BOOT_DEVICE(pmic_at_9) = {\n self.assertEqual('''#include \n #include \n struct dtd_source {\n-\\tstruct phandle_2_cell clocks[1];\n+\\tstruct phandle_1_arg clocks[1];\n };\n struct dtd_target {\n \\tfdt32_t\\t\\tintval;\n","prefixes":["U-Boot","v2","11/16"]}