{"id":806778,"url":"http://patchwork.ozlabs.org/api/1.0/patches/806778/?format=json","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.0/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20170828211918.11573-15-tony@atomide.com>","date":"2017-08-28T21:19:15","name":"[14/17] ARM: dts: Add missing gpu node and binding for omap4","commit_ref":null,"pull_url":null,"state":"superseded","archived":true,"hash":"9e84bdaa5cc1febad7a4bf8450142ed13319c09d","submitter":{"id":365,"url":"http://patchwork.ozlabs.org/api/1.0/people/365/?format=json","name":"Tony Lindgren","email":"tony@atomide.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/20170828211918.11573-15-tony@atomide.com/mbox/","series":[{"id":261,"url":"http://patchwork.ozlabs.org/api/1.0/series/261/?format=json","date":"2017-08-28T21:19:01","name":"Fix missing device tree hwmods and IO ranges omap variants","version":1,"mbox":"http://patchwork.ozlabs.org/series/261/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/806778/checks/","tags":{},"headers":{"Return-Path":"<devicetree-owner@vger.kernel.org>","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=<UNKNOWN>)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xh4sz5ykBz9t6l\n\tfor <incoming-dt@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 07:39:34 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751341AbdH1VUM (ORCPT\n\t<rfc822;incoming-dt@patchwork.ozlabs.org>);\n\tMon, 28 Aug 2017 17:20:12 -0400","from muru.com ([72.249.23.125]:38262 \"EHLO muru.com\"\n\trhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP\n\tid S1751336AbdH1VUL (ORCPT <rfc822;devicetree@vger.kernel.org>);\n\tMon, 28 Aug 2017 17:20:11 -0400","from sampyla.muru.com (localhost [127.0.0.1])\n\tby muru.com (Postfix) with ESMTP id 91FE1826A;\n\tMon, 28 Aug 2017 21:20:30 +0000 (UTC)"],"From":"Tony Lindgren <tony@atomide.com>","To":"linux-omap@vger.kernel.org","Cc":"=?utf-8?q?Beno=C3=AEt_Cousson?= <bcousson@baylibre.com>,\n\tdevicetree@vger.kernel.org, Tomi Valkeinen <tomi.valkeinen@ti.com>","Subject":"[PATCH 14/17] ARM: dts: Add missing gpu node and binding for omap4","Date":"Mon, 28 Aug 2017 14:19:15 -0700","Message-Id":"<20170828211918.11573-15-tony@atomide.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170828211918.11573-1-tony@atomide.com>","References":"<20170828211918.11573-1-tony@atomide.com>","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<devicetree.vger.kernel.org>","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"On omap4 we're missing the PowerVR SGX GPU node with it's related\n\"ti,hwmods\" property that the SoC interconnect code needs.\n\nNote that this will only show up as a bug with \"doesn't have\nmpu register target base\" boot errors when the legacy platform\ndata is removed.\n\nCc: Tomi Valkeinen <tomi.valkeinen@ti.com>\nSigned-off-by: Tony Lindgren <tony@atomide.com>\n---\n .../devicetree/bindings/gpu/ti-powervr-sgx.txt     | 34 ++++++++++++++++++++++\n arch/arm/boot/dts/omap4.dtsi                       |  7 +++++\n 2 files changed, 41 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt","diff":"diff --git a/Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt b/Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt\nnew file mode 100644\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/gpu/ti-powervr-sgx.txt\n@@ -0,0 +1,34 @@\n+Texas Instruments PowevVR SGX binding\n+\n+SGX can be used for graphics acceleration on Texas Instruments SoCs.\n+\n+Note that the SGX binding is currently only used by the SoC interconnect\n+code to idle the module on init and no open source driver is available\n+for SGX. Please update this documentation if that changes.\n+\n+Required properties:\n+\n+compatible: Shall be one of the following:\n+\t    \"ti,omap4-gpu\"\n+\n+reg: Shall contain the device instance IO range\n+\n+interrupts: Shall contain the device instance interrupt\n+\n+\n+Optional properties:\n+\n+reg-names: Shall contain the IO range names if multiple IO\n+\t   ranges are used by the SoC\n+\n+ti,hwmods: Shall contain the TI interconnect module name if needed\n+\t   by the SoC\n+\n+\n+Example:\n+\tgpu: gpu@56000000 {\n+\t\tcompatible = \"ti,omap4-gpu\";\n+\t\treg = <0x56000000 0x10000>;\n+\t\tinterrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;\n+\t\tti,hwmods = \"gpu\";\n+\t};\ndiff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi\n--- a/arch/arm/boot/dts/omap4.dtsi\n+++ b/arch/arm/boot/dts/omap4.dtsi\n@@ -1086,6 +1086,13 @@\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n+\t\tgpu: gpu@56000000 {\n+\t\t\tcompatible = \"ti,omap4-gpu\";\n+\t\t\treg = <0x56000000 0x10000>;\n+\t\t\tinterrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t\tti,hwmods = \"gpu\";\n+\t\t};\n+\n \t\tdss: dss@58000000 {\n \t\t\tcompatible = \"ti,omap4-dss\";\n \t\t\treg = <0x58000000 0x80>;\n","prefixes":["14/17"]}