{"id":806759,"url":"http://patchwork.ozlabs.org/api/1.0/patches/806759/?format=json","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/1.0/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20170828202934.17073.940.stgit@tlendack-t1.amdoffice.net>","date":"2017-08-28T20:29:34","name":"[net-next,v1] amd-xgbe: Interrupt summary bits are h/w version dependent","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"0a91161b72c60f3935f1457176320271807ee481","submitter":{"id":47310,"url":"http://patchwork.ozlabs.org/api/1.0/people/47310/?format=json","name":"Tom Lendacky","email":"Thomas.Lendacky@amd.com"},"delegate":{"id":34,"url":"http://patchwork.ozlabs.org/api/1.0/users/34/?format=json","username":"davem","first_name":"David","last_name":"Miller","email":"davem@davemloft.net"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20170828202934.17073.940.stgit@tlendack-t1.amdoffice.net/mbox/","series":[{"id":253,"url":"http://patchwork.ozlabs.org/api/1.0/series/253/?format=json","date":"2017-08-28T20:29:34","name":"[net-next,v1] amd-xgbe: Interrupt summary bits are h/w version dependent","version":1,"mbox":"http://patchwork.ozlabs.org/series/253/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/806759/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; 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Mon, 28 Aug 2017 20:29:38 +0000"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n\td=amdcloud.onmicrosoft.com; s=selector1-amd-com;\n\th=From:Date:Subject:Message-ID:Content-Type:MIME-Version;\n\tbh=U0IU+SwPpFrhWRpck3mMQvltjmfU5v8xZUI70eVjBww=;\n\tb=B5kbQ+79PXeUm61ij6sY5d+BepIPzSmmzILjOb77hE87M4/Pwtvc9z3deam05hR9pCaFmNw8W7ahX54hUqtILgkff3xp3py2B+cpfuW3JHA/bUJXp8cnKKwjkj63J15LrbBbkc3BxuCYjpYHHkTxsRvVLIb3hTWtGjhD7ygwlhs=","From":"Tom Lendacky ","Subject":"[PATCH net-next v1] amd-xgbe: Interrupt summary bits are h/w\n\tversion dependent","To":"netdev@vger.kernel.org","Cc":"David Miller ","Date":"Mon, 28 Aug 2017 15:29:34 -0500","Message-ID":"<20170828202934.17073.940.stgit@tlendack-t1.amdoffice.net>","User-Agent":"StGit/0.17.1-dirty","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","X-Originating-IP":"[165.204.77.1]","X-ClientProxiedBy":"MWHPR14CA0018.namprd14.prod.outlook.com (10.173.227.28) To\n\tBN6PR12MB1139.namprd12.prod.outlook.com (10.168.226.141)","X-MS-PublicTrafficType":"Email","X-MS-Office365-Filtering-Correlation-Id":"c3f675b6-ab3f-429d-2f20-08d4ee5381b0","X-MS-Office365-Filtering-HT":"Tenant","X-Microsoft-Antispam":"UriScan:; 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PCL:0;\n\tRULEID:(100000700101)(100105000095)(100000701101)(100105300095)(100000702101)(100105100095)(6040450)(601004)(2401047)(5005006)(8121501046)(100000703101)(100105400095)(93006095)(93001095)(10201501046)(3002001)(6055026)(6041248)(20161123558100)(201703131423075)(201702281528075)(201703061421075)(201703061406153)(20161123560025)(20161123564025)(20161123555025)(20161123562025)(6072148)(201708071742011)(100000704101)(100105200095)(100000705101)(100105500095);\n\tSRVR:BN6PR12MB1139; BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:BN6PR12MB1139; ","X-Forefront-PRVS":"0413C9F1ED","X-Forefront-Antispam-Report":"SFV:NSPM;\n\tSFS:(10009020)(7370300001)(4630300001)(6009001)(39860400002)(189002)(199003)(23676002)(110136004)(86362001)(5660300001)(72206003)(9686003)(55016002)(33646002)(4326008)(53936002)(101416001)(103116003)(189998001)(50466002)(7350300001)(42186005)(69596002)(53416004)(2361001)(97736004)(2351001)(4001350100001)(105586002)(106356001)(68736007)(305945005)(81156014)(81166006)(8676002)(7736002)(47776003)(66066001)(97746001)(83506001)(6666003)(1076002)(25786009)(2906002)(3846002)(54356999)(230700001)(6116002)(6506006)(50986999)(478600001)(6916009);\n\tDIR:OUT; SFP:1101; SCL:1; SRVR:BN6PR12MB1139;\n\tH:tlendack-t1.amdoffice.net; FPR:; SPF:None; PTR:InfoNoRecords;\n\tMX:1; A:1; LANG:en; ","Received-SPF":"None (protection.outlook.com: amd.com does not designate\n\tpermitted sender hosts)","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-OriginatorOrg":"amd.com","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"28 Aug 2017 20:29:38.4867\n\t(UTC)","X-MS-Exchange-CrossTenant-FromEntityHeader":"Hosted","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"BN6PR12MB1139","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"There is a difference in the bit position of the normal interrupt summary\nenable (NIE) and abnormal interrupt summary enable (AIE) between revisions\nof the hardware. For older revisions the NIE and AIE bits are positions\n16 and 15 respectively. For newer revisions the NIE and AIE bits are\npositions 15 and 14. The effect in changing the bit position is that\nnewer hardware won't receive AIE interrupts in the current version of the\ndriver. Specifically, the driver uses this interrupt to collect\nstatistics on when a receive buffer unavailable event occurs and to\nrestart the driver/device when a fatal bus error occurs.\n\nUpdate the driver to set the interrupt enable bit based on the reported\nversion of the hardware.\n\nSigned-off-by: Tom Lendacky \n---\n drivers/net/ethernet/amd/xgbe/xgbe-common.h | 8 ++++++--\n drivers/net/ethernet/amd/xgbe/xgbe-dev.c | 13 ++++++++++---\n 2 files changed, 16 insertions(+), 5 deletions(-)","diff":"diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-common.h b/drivers/net/ethernet/amd/xgbe/xgbe-common.h\nindex 9431330..7ea72ef 100644\n--- a/drivers/net/ethernet/amd/xgbe/xgbe-common.h\n+++ b/drivers/net/ethernet/amd/xgbe/xgbe-common.h\n@@ -210,11 +210,15 @@\n #define DMA_CH_CR_PBLX8_WIDTH\t\t1\n #define DMA_CH_CR_SPH_INDEX\t\t24\n #define DMA_CH_CR_SPH_WIDTH\t\t1\n-#define DMA_CH_IER_AIE_INDEX\t\t15\n+#define DMA_CH_IER_AIE20_INDEX\t\t15\n+#define DMA_CH_IER_AIE20_WIDTH\t\t1\n+#define DMA_CH_IER_AIE_INDEX\t\t14\n #define DMA_CH_IER_AIE_WIDTH\t\t1\n #define DMA_CH_IER_FBEE_INDEX\t\t12\n #define DMA_CH_IER_FBEE_WIDTH\t\t1\n-#define DMA_CH_IER_NIE_INDEX\t\t16\n+#define DMA_CH_IER_NIE20_INDEX\t\t16\n+#define DMA_CH_IER_NIE20_WIDTH\t\t1\n+#define DMA_CH_IER_NIE_INDEX\t\t15\n #define DMA_CH_IER_NIE_WIDTH\t\t1\n #define DMA_CH_IER_RBUE_INDEX\t\t7\n #define DMA_CH_IER_RBUE_WIDTH\t\t1\ndiff --git a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c\nindex 671203d..e107e18 100644\n--- a/drivers/net/ethernet/amd/xgbe/xgbe-dev.c\n+++ b/drivers/net/ethernet/amd/xgbe/xgbe-dev.c\n@@ -649,13 +649,15 @@ static void xgbe_config_flow_control(struct xgbe_prv_data *pdata)\n static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata)\n {\n \tstruct xgbe_channel *channel;\n-\tunsigned int i;\n+\tunsigned int i, ver;\n \n \t/* Set the interrupt mode if supported */\n \tif (pdata->channel_irq_mode)\n \t\tXGMAC_IOWRITE_BITS(pdata, DMA_MR, INTM,\n \t\t\t\t pdata->channel_irq_mode);\n \n+\tver = XGMAC_GET_BITS(pdata->hw_feat.version, MAC_VR, SNPSVER);\n+\n \tfor (i = 0; i < pdata->channel_count; i++) {\n \t\tchannel = pdata->channel[i];\n \n@@ -671,8 +673,13 @@ static void xgbe_enable_dma_interrupts(struct xgbe_prv_data *pdata)\n \t\t * AIE - Abnormal Interrupt Summary Enable\n \t\t * FBEE - Fatal Bus Error Enable\n \t\t */\n-\t\tXGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, NIE, 1);\n-\t\tXGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, AIE, 1);\n+\t\tif (ver < 0x21) {\n+\t\t\tXGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, NIE20, 1);\n+\t\t\tXGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, AIE20, 1);\n+\t\t} else {\n+\t\t\tXGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, NIE, 1);\n+\t\t\tXGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, AIE, 1);\n+\t\t}\n \t\tXGMAC_SET_BITS(channel->curr_ier, DMA_CH_IER, FBEE, 1);\n \n \t\tif (channel->tx_ring) {\n","prefixes":["net-next","v1"]}