{"id":806714,"url":"http://patchwork.ozlabs.org/api/1.0/patches/806714/?format=json","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/1.0/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20170828185001.GA9268@ibm-tiger.the-meissners.org>","date":"2017-08-28T18:50:02","name":", Fix PR 81959 (power9 IEEE 128-bit float convert from 32-bit memory)","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"f4348fa3f1692a0ef9cd9dc74e216b9f7b5bcd39","submitter":{"id":4611,"url":"http://patchwork.ozlabs.org/api/1.0/people/4611/?format=json","name":"Michael Meissner","email":"meissner@linux.vnet.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/20170828185001.GA9268@ibm-tiger.the-meissners.org/mbox/","series":[{"id":239,"url":"http://patchwork.ozlabs.org/api/1.0/series/239/?format=json","date":"2017-08-28T18:50:02","name":", Fix PR 81959 (power9 IEEE 128-bit float convert from 32-bit memory)","version":1,"mbox":"http://patchwork.ozlabs.org/series/239/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/806714/checks/","tags":{},"headers":{"Return-Path":"<gcc-patches-return-461041-incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":["patchwork-incoming@bilbo.ozlabs.org","mailing list gcc-patches@gcc.gnu.org"],"Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org\n\t(client-ip=209.132.180.131; helo=sourceware.org;\n\tenvelope-from=gcc-patches-return-461041-incoming=patchwork.ozlabs.org@gcc.gnu.org;\n\treceiver=<UNKNOWN>)","ozlabs.org; dkim=pass (1024-bit key;\n\tunprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org\n\theader.b=\"yJCOUM2L\"; dkim-atps=neutral","sourceware.org; auth=none"],"Received":["from sourceware.org (server1.sourceware.org [209.132.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256\n\tbits)) (No client certificate requested)\n\tby ozlabs.org (Postfix) with ESMTPS id 3xh16q3YcKz9s9Y\n\tfor <incoming@patchwork.ozlabs.org>;\n\tTue, 29 Aug 2017 04:50:26 +1000 (AEST)","(qmail 67505 invoked by alias); 28 Aug 2017 18:50:19 -0000","(qmail 67493 invoked by uid 89); 28 Aug 2017 18:50:18 -0000","from mx0a-001b2d01.pphosted.com (HELO mx0a-001b2d01.pphosted.com)\n\t(148.163.156.1) by sourceware.org\n\t(qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP;\n\tMon, 28 Aug 2017 18:50:08 +0000","from pps.filterd (m0098394.ppops.net [127.0.0.1])\tby\n\tmx0a-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7SIn5hv054012\tfor <gcc-patches@gcc.gnu.org>;\n\tMon, 28 Aug 2017 14:50:06 -0400","from e37.co.us.ibm.com (e37.co.us.ibm.com [32.97.110.158])\tby\n\tmx0a-001b2d01.pphosted.com with ESMTP id\n\t2cmjbdkaw3-1\t(version=TLSv1.2 cipher=AES256-SHA bits=256\n\tverify=NOT)\tfor <gcc-patches@gcc.gnu.org>;\n\tMon, 28 Aug 2017 14:50:06 -0400","from localhost\tby e37.co.us.ibm.com with IBM ESMTP SMTP Gateway:\n\tAuthorized Use Only! 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Violators will be prosecuted;\n\tMon, 28 Aug 2017 12:50:03 -0600","from b03ledav003.gho.boulder.ibm.com\n\t(b03ledav003.gho.boulder.ibm.com [9.17.130.234])\tby\n\tb03cxnp07029.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0)\n\twith ESMTP id v7SIo2Ag9306562; Mon, 28 Aug 2017 11:50:03 -0700","from b03ledav003.gho.boulder.ibm.com (unknown [127.0.0.1])\tby\n\tIMSVA (Postfix) with ESMTP id 39C826A041;\n\tMon, 28 Aug 2017 12:50:02 -0600 (MDT)","from ibm-tiger.the-meissners.org (unknown [9.32.77.111])\tby\n\tb03ledav003.gho.boulder.ibm.com (Postfix) with ESMTP id\n\t115136A045; Mon, 28 Aug 2017 12:50:02 -0600 (MDT)","by ibm-tiger.the-meissners.org (Postfix, from userid 500)\tid\n\t41BB747543; Mon, 28 Aug 2017 14:50:02 -0400 (EDT)"],"DomainKey-Signature":"a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:date\n\t:from:to:subject:mime-version:content-type:message-id; q=dns; s=\n\tdefault; b=VXnjuhYxbA/Fy7PXDJMnF/8pvO52SOhmwnrQryGj9JNB37mOpQtBZ\n\tNFb4rG8rOSjN7M92cg90OnySbkNYJNUIosRfBIwIL7y25nwsSpkEhivpJEVvL+sd\n\t63QI8znom9YHL6C4e6elL+0Eyze3aKnLiKqNJmwxmQnTFg5BFAVGW8=","DKIM-Signature":"v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id\n\t:list-unsubscribe:list-archive:list-post:list-help:sender:date\n\t:from:to:subject:mime-version:content-type:message-id; s=\n\tdefault; bh=TnO2TilRsugrVsrnwXrmXQeZSdo=; b=yJCOUM2LAjMZmwzqbxVt\n\tEDLxw/r4uz1iOM4hH+kKTsEtm8nw+sjD9shpNl+fj6jfWbiLL1k4DE4s63SHhjLQ\n\tv7z/iNqby86bjT68uygWjowR9hdEE9DmgWTBdPBY+GRiIs1jpKpOe/SR2FRWNu35\n\tGN85f+7kcvyKl0pwmnvsuD4=","Mailing-List":"contact gcc-patches-help@gcc.gnu.org; run by ezmlm","Precedence":"bulk","List-Id":"<gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<mailto:gcc-patches-unsubscribe-incoming=patchwork.ozlabs.org@gcc.gnu.org>","List-Archive":"<http://gcc.gnu.org/ml/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-help@gcc.gnu.org>","Sender":"gcc-patches-owner@gcc.gnu.org","X-Virus-Found":"No","X-Spam-SWARE-Status":"No, score=-9.9 required=5.0 tests=AWL, BAYES_00,\n\tGIT_PATCH_2, GIT_PATCH_3, KAM_ASCII_DIVIDERS,\n\tKAM_LAZY_DOMAIN_SECURITY,\n\tRCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=U*meissner,\n\tHTo:U*segher, sk:meissne","X-HELO":"mx0a-001b2d01.pphosted.com","Date":"Mon, 28 Aug 2017 14:50:02 -0400","From":"Michael Meissner <meissner@linux.vnet.ibm.com>","To":"GCC Patches <gcc-patches@gcc.gnu.org>,\n\tSegher Boessenkool <segher@kernel.crashing.org>,\n\tDavid Edelsohn <dje.gcc@gmail.com>,\n\tBill Schmidt <wschmidt@linux.vnet.ibm.com>","Subject":"[PATCH],\n\tFix PR 81959 (power9 IEEE 128-bit float convert from 32-bit memory)","Mail-Followup-To":"Michael Meissner <meissner@linux.vnet.ibm.com>,\n\tGCC Patches <gcc-patches@gcc.gnu.org>,\n\tSegher Boessenkool <segher@kernel.crashing.org>,\n\tDavid Edelsohn <dje.gcc@gmail.com>,\n\tBill Schmidt <wschmidt@linux.vnet.ibm.com>","MIME-Version":"1.0","Content-Type":"multipart/mixed; boundary=\"PNTmBPCT7hxwcZjr\"","Content-Disposition":"inline","User-Agent":"Mutt/1.5.20 (2009-12-10)","X-TM-AS-GCONF":"00","x-cbid":"17082818-0024-0000-0000-0000171CA354","X-IBM-SpamModules-Scores":"","X-IBM-SpamModules-Versions":"BY=3.00007628; HX=3.00000241; KW=3.00000007;\n\tPH=3.00000004; SC=3.00000226; SDB=6.00908919; UDB=6.00455783;\n\tIPR=6.00689170; BA=6.00005557; NDR=6.00000001; ZLA=6.00000005;\n\tZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000;\n\tZU=6.00000002; MB=3.00016903; XFM=3.00000015;\n\tUTC=2017-08-28 18:50:04","X-IBM-AV-DETECTION":"SAVI=unused REMOTE=unused XFE=unused","x-cbparentid":"17082818-0025-0000-0000-00004C7E45B8","Message-Id":"<20170828185001.GA9268@ibm-tiger.the-meissners.org>","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-28_10:, , signatures=0","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n\tspamscore=0 suspectscore=0 malwarescore=0 phishscore=0\n\tadultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx\n\tscancount=1 engine=8.0.1-1707230000\n\tdefinitions=main-1708280298","X-IsSubscribed":"yes"},"content":"When I added the optimization for loading 32-bit values directly into the\nvector registers from memory to convert to IEEE 128-bit floating point, I\nforgot to make sure the address did not have PRE_INCREMENT, etc. addressing.\n\nI checked the compiler on a little endian power8 system.  Is it ok to check\nthis patch into the trunk and back port it GCC 7?  GCC 6 did not have the\noptimization.\n\n[gcc]\n2017-08-28  Michael Meissner  <meissner@linux.vnet.ibm.com>\n\n\tPR target/81959\n\t* config/rs6000/rs6000.md (float_<mode>si2_hw): If register\n\tallocation hasn't been done, make sure the memory address is\n\tX-FORM (register+register).\n\t(floatuns_<mode>si2_hw2): Likewise.\n\n[gcct/testsuite]\n2017-08-28  Michael Meissner  <meissner@linux.vnet.ibm.com>\n\n\tPR target/81959\n\t* gcc.target/powerpc/pr81959.c: New test.","diff":"Index: gcc/config/rs6000/rs6000.md\n===================================================================\n--- gcc/config/rs6000/rs6000.md\t(revision 251358)\n+++ gcc/config/rs6000/rs6000.md\t(working copy)\n@@ -14505,6 +14505,9 @@ (define_insn_and_split \"float_<mode>si2_\n {\n   if (GET_CODE (operands[2]) == SCRATCH)\n     operands[2] = gen_reg_rtx (DImode);\n+\n+  if (MEM_P (operands[1]) && !reload_completed)\n+    operands[1] = rs6000_address_for_fpconvert (operands[1]);\n })\n \n (define_insn_and_split \"float<QHI:mode><IEEE128:mode>2\"\n@@ -14568,6 +14571,9 @@ (define_insn_and_split \"floatuns_<mode>s\n {\n   if (GET_CODE (operands[2]) == SCRATCH)\n     operands[2] = gen_reg_rtx (DImode);\n+\n+  if (MEM_P (operands[1]) && !reload_completed)\n+    operands[1] = rs6000_address_for_fpconvert (operands[1]);\n })\n \n (define_insn_and_split \"floatuns<QHI:mode><IEEE128:mode>2\"\nIndex: gcc/testsuite/gcc.target/powerpc/pr81959.c\n===================================================================\n--- gcc/testsuite/gcc.target/powerpc/pr81959.c\t(revision 0)\n+++ gcc/testsuite/gcc.target/powerpc/pr81959.c\t(revision 0)\n@@ -0,0 +1,25 @@\n+/* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */\n+/* { dg-require-effective-target powerpc_p9vector_ok } */\n+/* { dg-options \"-mpower9-vector -O2 -mfloat128\" } */\n+\n+/* PR 81959, the compiler raised on unrecognizable insn message in converting\n+   int to __float128, where the int had a PRE_INC in the address.  */\n+\n+#ifndef ARRAY_SIZE\n+#define ARRAY_SIZE 1024\n+#endif\n+\n+void\n+convert_int_to_float128 (__float128 * __restrict__ p,\n+\t\t\t int * __restrict__ q)\n+{\n+  unsigned long i;\n+\n+  for (i = 0; i < ARRAY_SIZE; i++)\n+    p[i] = (__float128)q[i];\n+}\n+\n+/* { dg-final { scan-assembler     {\\mlfiwax\\M|\\mlxsiwax\\M} } } */\n+/* { dg-final { scan-assembler     {\\mxscvsdqp\\M}           } } */\n+/* { dg-final { scan-assembler-not {\\mmtvsrd\\M}             } } */\n+/* { dg-final { scan-assembler-not {\\mmtvsrw[sz]\\M}         } } */\n","prefixes":[]}