{"id":806606,"url":"http://patchwork.ozlabs.org/api/1.0/patches/806606/?format=json","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.0/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<1503930018-536-2-git-send-email-amelie.delaunay@st.com>","date":"2017-08-28T14:20:12","name":"[PATCHv2,1/7] dt-bindings: usb: Document the STM32F7 DWC2 USB OTG HS core binding","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"609ca2fc8efab8f003705933f61be517ed46284c","submitter":{"id":70517,"url":"http://patchwork.ozlabs.org/api/1.0/people/70517/?format=json","name":"Amelie DELAUNAY","email":"amelie.delaunay@st.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1503930018-536-2-git-send-email-amelie.delaunay@st.com/mbox/","series":[{"id":180,"url":"http://patchwork.ozlabs.org/api/1.0/series/180/?format=json","date":"2017-08-28T14:20:11","name":"Add support for USB OTG on STM32F7","version":1,"mbox":"http://patchwork.ozlabs.org/series/180/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/806606/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgvBz74K7z9s7m\n\tfor ;\n\tTue, 29 Aug 2017 00:23:39 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751345AbdH1OVK (ORCPT\n\t);\n\tMon, 28 Aug 2017 10:21:10 -0400","from mx08-00178001.pphosted.com ([91.207.212.93]:55335 \"EHLO\n\tmx07-00178001.pphosted.com\" rhost-flags-OK-OK-OK-FAIL)\n\tby vger.kernel.org with ESMTP id S1751207AbdH1OVH (ORCPT\n\t); Mon, 28 Aug 2017 10:21:07 -0400","from pps.filterd (m0046661.ppops.net [127.0.0.1])\n\tby mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7SE90tn011801; Mon, 28 Aug 2017 16:20:30 +0200","from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx08-.pphosted.com with ESMTP id 2cjyvejp11-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tMon, 28 Aug 2017 16:20:30 +0200","from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 69AB631;\n\tMon, 28 Aug 2017 14:20:29 +0000 (GMT)","from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 161BE285B;\n\tMon, 28 Aug 2017 14:20:29 +0000 (GMT)","from SAFEX1HUBCAS22.st.com (10.75.90.93) by SAFEX1HUBCAS21.st.com\n\t(10.75.90.44) with Microsoft SMTP Server (TLS) id 14.3.339.0;\n\tMon, 28 Aug 2017 16:20:28 +0200","from localhost (10.201.20.5) by Webmail-ga.st.com (10.75.90.48)\n\twith Microsoft SMTP Server (TLS) id 14.3.339.0;\n\tMon, 28 Aug 2017 16:20:28 +0200"],"From":"Amelie Delaunay ","To":"Greg Kroah-Hartman ,\n\tRob Herring , Mark Rutland ,\n\tRussell King ,\n\tMaxime Coquelin ,\n\tAlexandre Torgue ,\n\tJohn Youn ","CC":", ,\n\t, ,\n\tBenjamin Gaignard ,\n\tAmelie Delaunay ","Subject":"[PATCHv2 1/7] dt-bindings: usb: Document the STM32F7 DWC2 USB OTG HS\n\tcore binding","Date":"Mon, 28 Aug 2017 16:20:12 +0200","Message-ID":"<1503930018-536-2-git-send-email-amelie.delaunay@st.com>","X-Mailer":"git-send-email 2.7.4","In-Reply-To":"<1503930018-536-1-git-send-email-amelie.delaunay@st.com>","References":"<1503930018-536-1-git-send-email-amelie.delaunay@st.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-Originating-IP":"[10.201.20.5]","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-28_08:, , signatures=0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"This patch adds binding documentation for DWC2 controller in HS mode found\non STMicroelectronics STM32F7 SoC.\n\nSigned-off-by: Amelie Delaunay \n---\n Documentation/devicetree/bindings/usb/dwc2.txt | 2 ++\n 1 file changed, 2 insertions(+)","diff":"diff --git a/Documentation/devicetree/bindings/usb/dwc2.txt b/Documentation/devicetree/bindings/usb/dwc2.txt\nindex fcf199b..46da5f1 100644\n--- a/Documentation/devicetree/bindings/usb/dwc2.txt\n+++ b/Documentation/devicetree/bindings/usb/dwc2.txt\n@@ -19,6 +19,8 @@ Required properties:\n configured in FS mode;\n - \"st,stm32f4x9-hsotg\": The DWC2 USB HS controller instance in STM32F4x9 SoCs\n configured in HS mode;\n+ - \"st,stm32f7-hsotg\": The DWC2 USB HS controller instance in STM32F7 SoCs\n+ configured in HS mode;\n - reg : Should contain 1 register range (address and length)\n - interrupts : Should contain 1 interrupt\n - clocks: clock provider specifier\n","prefixes":["PATCHv2","1/7"]}