{"id":806481,"url":"http://patchwork.ozlabs.org/api/1.0/patches/806481/?format=json","project":{"id":37,"url":"http://patchwork.ozlabs.org/api/1.0/projects/37/?format=json","name":"Devicetree Bindings","link_name":"devicetree-bindings","list_id":"devicetree.vger.kernel.org","list_email":"devicetree@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<1503914654-19963-6-git-send-email-fabrice.gasnier@st.com>","date":"2017-08-28T10:04:10","name":"[RESEND,v3,5/9] dt-bindings: iio: Add STM32 LPTimer trigger binding","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"d3436b78df0fedb7c4dbebd914479c75fb6de0a2","submitter":{"id":65902,"url":"http://patchwork.ozlabs.org/api/1.0/people/65902/?format=json","name":"Fabrice Gasnier","email":"fabrice.gasnier@st.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/devicetree-bindings/patch/1503914654-19963-6-git-send-email-fabrice.gasnier@st.com/mbox/","series":[{"id":125,"url":"http://patchwork.ozlabs.org/api/1.0/series/125/?format=json","date":"2017-08-28T10:04:06","name":"Add STM32 LPTimer: PWM, trigger and counter","version":3,"mbox":"http://patchwork.ozlabs.org/series/125/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/806481/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming-dt@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming-dt@bilbo.ozlabs.org","Authentication-Results":"ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=vger.kernel.org\n\t(client-ip=209.132.180.67; helo=vger.kernel.org;\n\tenvelope-from=devicetree-owner@vger.kernel.org; receiver=)","Received":["from vger.kernel.org (vger.kernel.org [209.132.180.67])\n\tby ozlabs.org (Postfix) with ESMTP id 3xgnWW12V7z9sNq\n\tfor ;\n\tMon, 28 Aug 2017 20:07:35 +1000 (AEST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751437AbdH1KFQ (ORCPT\n\t);\n\tMon, 28 Aug 2017 06:05:16 -0400","from mx07-00178001.pphosted.com ([62.209.51.94]:18014 \"EHLO\n\tmx07-00178001.pphosted.com\" rhost-flags-OK-OK-OK-OK)\n\tby vger.kernel.org with ESMTP id S1751412AbdH1KFM (ORCPT\n\t); Mon, 28 Aug 2017 06:05:12 -0400","from pps.filterd (m0046668.ppops.net [127.0.0.1])\n\tby mx07-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id\n\tv7SA4abW021534; Mon, 28 Aug 2017 12:04:40 +0200","from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35])\n\tby mx07-.pphosted.com with ESMTP id 2cjxevheg5-1\n\t(version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT);\n\tMon, 28 Aug 2017 12:04:40 +0200","from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9])\n\tby beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 680A63F;\n\tMon, 28 Aug 2017 10:04:39 +0000 (GMT)","from Webmail-eu.st.com (sfhdag5node3.st.com [10.75.127.15])\n\tby zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2635C20BD;\n\tMon, 28 Aug 2017 10:04:39 +0000 (GMT)","from localhost (10.75.127.45) by SFHDAG5NODE3.st.com (10.75.127.15)\n\twith Microsoft SMTP Server (TLS) id 15.0.1178.4;\n\tMon, 28 Aug 2017 12:04:38 +0200"],"From":"Fabrice Gasnier ","To":", ,\n\t, , ","CC":", ,\n\t, ,\n\t, ,\n\t, , \n\t, ,\n\t","Subject":"[RESEND PATCH v3 5/9] dt-bindings: iio: Add STM32 LPTimer trigger\n\tbinding","Date":"Mon, 28 Aug 2017 12:04:10 +0200","Message-ID":"<1503914654-19963-6-git-send-email-fabrice.gasnier@st.com>","X-Mailer":"git-send-email 1.9.1","In-Reply-To":"<1503914654-19963-1-git-send-email-fabrice.gasnier@st.com>","References":"<1503914654-19963-1-git-send-email-fabrice.gasnier@st.com>","MIME-Version":"1.0","Content-Type":"text/plain","X-Originating-IP":"[10.75.127.45]","X-ClientProxiedBy":"SFHDAG3NODE1.st.com (10.75.127.7) To SFHDAG5NODE3.st.com\n\t(10.75.127.15)","X-Proofpoint-Virus-Version":"vendor=fsecure engine=2.50.10432:, ,\n\tdefinitions=2017-08-28_06:, , signatures=0","Sender":"devicetree-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"devicetree@vger.kernel.org"},"content":"Add documentation for STMicroelectronics STM32 Low-Power Timer Trigger\nbinding.\n\nSigned-off-by: Fabrice Gasnier \nAcked-by: Jonathan Cameron \nAcked-by: Rob Herring \n---\nChanges in v3:\n- Rob's comments: node name timer@..., update reg property\n description\n\nChanges in v2:\n- s/Low Power/Low-Power\n- remove leading 0x in example (parent node)\n- improve reg property description\n---\n .../bindings/iio/timer/stm32-lptimer-trigger.txt | 23 ++++++++++++++++++++++\n 1 file changed, 23 insertions(+)\n create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-lptimer-trigger.txt","diff":"diff --git a/Documentation/devicetree/bindings/iio/timer/stm32-lptimer-trigger.txt b/Documentation/devicetree/bindings/iio/timer/stm32-lptimer-trigger.txt\nnew file mode 100644\nindex 0000000..85e6806\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/iio/timer/stm32-lptimer-trigger.txt\n@@ -0,0 +1,23 @@\n+STMicroelectronics STM32 Low-Power Timer Trigger\n+\n+STM32 Low-Power Timer provides trigger source (LPTIM output) that can be used\n+by STM32 internal ADC and/or DAC.\n+\n+Must be a sub-node of an STM32 Low-Power Timer device tree node.\n+See ../mfd/stm32-lptimer.txt for details about the parent node.\n+\n+Required properties:\n+- compatible:\t\tMust be \"st,stm32-lptimer-trigger\".\n+- reg:\t\t\tIdentify trigger hardware block. Must be 0, 1 or 2\n+\t\t\trespectively for lptimer1, lptimer2 or lptimer3\n+\t\t\ttrigger output.\n+\n+Example:\n+\ttimer@40002400 {\n+\t\tcompatible = \"st,stm32-lptimer\";\n+\t\t...\n+\t\ttrigger@0 {\n+\t\t\tcompatible = \"st,stm32-lptimer-trigger\";\n+\t\t\treg = <0>;\n+\t\t};\n+\t};\n","prefixes":["RESEND","v3","5/9"]}