{"id":806464,"url":"http://patchwork.ozlabs.org/api/1.0/patches/806464/?format=json","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.0/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20170828091533.15133-6-ran.wang_1@nxp.com>","date":"2017-08-28T09:15:31","name":"[U-Boot,v4,6/8] armv7: Add workaround for USB erratum A-009798","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"48780b3a137b18392e7db804bd9f9816bbe685c5","submitter":{"id":71939,"url":"http://patchwork.ozlabs.org/api/1.0/people/71939/?format=json","name":"Ran Wang","email":"ran.wang_1@nxp.com"},"delegate":{"id":2666,"url":"http://patchwork.ozlabs.org/api/1.0/users/2666/?format=json","username":"yorksun","first_name":"York","last_name":"Sun","email":"yorksun@freescale.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20170828091533.15133-6-ran.wang_1@nxp.com/mbox/","series":[{"id":118,"url":"http://patchwork.ozlabs.org/api/1.0/series/118/?format=json","date":"2017-08-28T09:15:26","name":"[U-Boot,v4,1/8] armv8: Add workaround for USB erratum A-009008","version":4,"mbox":"http://patchwork.ozlabs.org/series/118/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/806464/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=none (mailfrom) smtp.mailfrom=lists.denx.de\n\t(client-ip=81.169.180.215; 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\n\tclient-ip=192.88.168.50; helo=tx30smr01.am.freescale.net;","From":"Ran Wang ","To":"open list , York Sun ","Date":"Mon, 28 Aug 2017 17:15:31 +0800","Message-ID":"<20170828091533.15133-6-ran.wang_1@nxp.com>","X-Mailer":"git-send-email 2.14.1","In-Reply-To":"<20170828091533.15133-1-ran.wang_1@nxp.com>","References":"<20170828091533.15133-1-ran.wang_1@nxp.com>","X-EOPAttributedMessage":"0","X-Matching-Connectors":"131483863774137698;\n\t(91ab9b29-cfa4-454e-5278-08d120cd25b8); ()","X-Forefront-Antispam-Report":"CIP:192.88.168.50; IPV:NLI; CTRY:US; EFV:NLI;\n\tSFV:NSPM;\n\tSFS:(10009020)(979002)(6009001)(336005)(39380400002)(39860400002)(2980300002)(1109001)(1110001)(339900001)(189002)(199003)(105606002)(50466002)(50226002)(5003940100001)(85426001)(77096006)(8936002)(47776003)(68736007)(575784001)(86362001)(498600001)(81166006)(305945005)(626005)(8676002)(4326008)(81156014)(76176999)(104016004)(2906002)(1076002)(5660300001)(53936002)(36756003)(8656003)(356003)(7416002)(50986999)(33646002)(6666003)(189998001)(54906002)(48376002)(97736004)(106466001)(6636002)(2950100002)(969003)(989001)(999001)(1009001)(1019001);\n\tDIR:OUT; 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BCL:0; PCL:0;\n\tRULEID:(100000800101)(100110000095)(100000801101)(100110300095)(100000802101)(100110100095)(100000803101)(100110400095)(400006)(100000804101)(100110200095)(100000805101)(100110500095);\n\tSRVR:CY1PR03MB2267; ","X-Forefront-PRVS":"0413C9F1ED","SpamDiagnosticOutput":"1:99","SpamDiagnosticMetadata":"NSPM","X-MS-Exchange-CrossTenant-OriginalArrivalTime":"28 Aug 2017 09:32:57.2265\n\t(UTC)","X-MS-Exchange-CrossTenant-Id":"5afe0b00-7697-4969-b663-5eab37d5f47e","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"TenantId=5afe0b00-7697-4969-b663-5eab37d5f47e;\n\tIp=[192.88.168.50]; \n\tHelo=[tx30smr01.am.freescale.net]","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"CY1PR03MB2267","Cc":"Priyanka Jain ,\n\tSuresh Gupta , ran.wang_1@nxp.com","Subject":"[U-Boot] [PATCH v4 6/8] armv7: Add workaround for USB erratum\n\tA-009798","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.18","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"base64","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" "},"content":"The default setting for USB High Speed Squelch Threshold results\nin a threshold close to or lower than 100mV. This leads to Receive\nCompliance test failure for a 100mV threshold.\n\nShift the threshold from ~100mV towards ~130mV by setting SQRXTUNE\nto 0x0 to pass USB High Speed Receiver Sensitivity Compliance test.\n\nSigned-off-by: Sriram Dash \nSigned-off-by: Rajesh Bhagat \nSigned-off-by: Suresh Gupta \nSigned-off-by: Ran Wang \n---\nChange in v4:\n\tUpdate commit message about register setting.\n\tClean up the math in register setting.\n\tRedefine SQRXTUNE to make code clearer.\n\nChange in v3:\n- none\n\nChange in v2:\n\tIn function erratum_a009798():\n\t1.Put a blank line after variable declaration.\n\n arch/arm/cpu/armv7/ls102xa/Kconfig | 8 +++++++-\n arch/arm/cpu/armv7/ls102xa/soc.c | 11 +++++++++++\n arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h | 1 +\n 3 files changed, 19 insertions(+), 1 deletion(-)","diff":"diff --git a/arch/arm/cpu/armv7/ls102xa/Kconfig b/arch/arm/cpu/armv7/ls102xa/Kconfig\nindex 599cc28249..f09766cf03 100644\n--- a/arch/arm/cpu/armv7/ls102xa/Kconfig\n+++ b/arch/arm/cpu/armv7/ls102xa/Kconfig\n@@ -6,6 +6,7 @@ config ARCH_LS1021A\n \tselect SYS_FSL_ERRATUM_A009942\n \tselect SYS_FSL_ERRATUM_A010315\n \tselect SYS_FSL_ERRATUM_A009008\n+\tselect SYS_FSL_ERRATUM_A009798\n \tselect SYS_FSL_SRDS_1\n \tselect SYS_HAS_SERDES\n \tselect SYS_FSL_DDR_BE if SYS_FSL_DDR\n@@ -56,7 +57,12 @@ config SYS_FSL_ERRATUM_A010315\n config SYS_FSL_ERRATUM_A009008\n \tbool\n \thelp\n-\t\tWorkaround for USB erratum A009008\n+\t\tWorkaround for USB PHY erratum A009008\n+\n+config SYS_FSL_ERRATUM_A009798\n+\tbool\n+\thelp\n+\t\tWorkaround for USB PHY erratum A009798\n \n config SYS_FSL_SRDS_1\n \tbool\ndiff --git a/arch/arm/cpu/armv7/ls102xa/soc.c b/arch/arm/cpu/armv7/ls102xa/soc.c\nindex 0cdc625380..487b5cf0ec 100644\n--- a/arch/arm/cpu/armv7/ls102xa/soc.c\n+++ b/arch/arm/cpu/armv7/ls102xa/soc.c\n@@ -72,6 +72,16 @@ static void erratum_a009008(void)\n #endif /* CONFIG_SYS_FSL_ERRATUM_A009008 */\n }\n \n+static void erratum_a009798(void)\n+{\n+#ifdef CONFIG_SYS_FSL_ERRATUM_A009798\n+\tu32 __iomem *scfg = (u32 __iomem *)SCFG_BASE;\n+\tu32 val = in_be32(scfg + SCFG_USB3PRM1CR / 4);\n+\n+\tval &= ~(SCFG_USB_SQRXTUNE_MASK << 23);\n+\tout_be32(scfg + SCFG_USB3PRM1CR / 4, val);\n+#endif /* CONFIG_SYS_FSL_ERRATUM_A009798 */\n+}\n \n void s_init(void)\n {\n@@ -161,6 +171,7 @@ int arch_soc_init(void)\n \n \t/* Erratum */\n \terratum_a009008();\n+\terratum_a009798();\n \n \treturn 0;\n }\ndiff --git a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\nindex ba59f40382..5762d3308a 100644\n--- a/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\n+++ b/arch/arm/include/asm/arch-ls102xa/immap_ls102xa.h\n@@ -176,6 +176,7 @@ struct ccsr_gur {\n #define SCFG_BASE\t\t\t0x01570000\n #define SCFG_USB3PRM1CR\t\t\t0x070\n #define SCFG_USB_TXVREFTUNE\t\t0x9\n+#define SCFG_USB_SQRXTUNE_MASK\t\t0x7\n \n /* Supplemental Configuration Unit */\n struct ccsr_scfg {\n","prefixes":["U-Boot","v4","6/8"]}