{"id":806337,"url":"http://patchwork.ozlabs.org/api/1.0/patches/806337/?format=json","project":{"id":3,"url":"http://patchwork.ozlabs.org/api/1.0/projects/3/?format=json","name":"Linux MTD development","link_name":"linux-mtd","list_id":"linux-mtd.lists.infradead.org","list_email":"linux-mtd@lists.infradead.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<1503885509-25335-1-git-send-email-andy.yan@rock-chips.com>","date":"2017-08-28T01:58:29","name":"[v7,1/2] mtd: spi-nor: add a quad_enable callback in struct flash_info","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"b4d70692785043472a4baf3b4efff393e2dd3efe","submitter":{"id":65124,"url":"http://patchwork.ozlabs.org/api/1.0/people/65124/?format=json","name":"Andy Yan","email":"andy.yan@rock-chips.com"},"delegate":{"id":63396,"url":"http://patchwork.ozlabs.org/api/1.0/users/63396/?format=json","username":"cpitchen","first_name":"Cyrille","last_name":"Pitchen","email":"cyrille.pitchen@atmel.com"},"mbox":"http://patchwork.ozlabs.org/project/linux-mtd/patch/1503885509-25335-1-git-send-email-andy.yan@rock-chips.com/mbox/","series":[{"id":57,"url":"http://patchwork.ozlabs.org/api/1.0/series/57/?format=json","date":"2017-08-28T01:58:29","name":"[v7,1/2] mtd: spi-nor: add a quad_enable callback in struct flash_info","version":7,"mbox":"http://patchwork.ozlabs.org/series/57/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/806337/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org; 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Mon, 28 Aug 2017 01:59:36 +0000","from andy.yan?rock-chips.com (unknown [192.168.167.190])\n\tby regular1.263xmail.com (Postfix) with ESMTP id C7CAB1E300;\n\tMon, 28 Aug 2017 09:59:02 +0800 (CST)","from localhost.localdomain (localhost [127.0.0.1])\n\tby smtp.263.net (Postfix) with ESMTPA id 350773C0;\n\tMon, 28 Aug 2017 09:58:58 +0800 (CST)","from localhost.localdomain (unknown [58.22.7.114])\n\tby smtp.263.net (Postfix) whith ESMTP id 27504L24AGD;\n\tMon, 28 Aug 2017 09:59:02 +0800 (CST)"],"DKIM-Signature":"v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20170209; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:MIME-Version:Cc:List-Subscribe:\n\tList-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date:\n\tSubject:To:From:Reply-To:Content-ID:Content-Description:Resent-Date:\n\tResent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:\n\tReferences:List-Owner; bh=g3z+6bPm/WPoMWaKbCVOU8N3xKTqPAh1UXIU76Bdm/o=;\n\tb=G5o\n\t6803BHXy+ziH9OTSiY8cwIC/451syZP0Ohu7IAFy56qgKs8FZ9bAH+YADGs/UNCKv46XJWI3CTofD\n\tqO/FA4zKR9wMtph4DSE8CcJos3R4xZ4u3ALkN+xYDpw4CYz4x282Xwda6v9VYJCwXhRza+U3w5/Ca\n\t8OALoo5DVpsC2Gb4UbwBQPiB83I4auVNzMmUes5+nWREUmtm0DxXIJCd6iYHscMNIbR6O9WLc3wwi\n\tn5df01nTIca1Mz8AIS7Ni6CeRFjOFGQltE0Dzt+1W32ukow0ciSezAc/MiG3i3slYDz28Vo0JqMHo\n\tOP06LAESb16I6uzYqblWyigcYs7SRbA==;","X-263anti-spam":"KSV:0;","X-MAIL-GRAY":"0","X-MAIL-DELIVERY":"1","X-KSVirus-check":"0","X-ABS-CHECKED":"4","X-RL-SENDER":"andy.yan@rock-chips.com","X-FST-TO":"cyrille.pitchen@wedev4u.fr","X-SENDER-IP":"58.22.7.114","X-LOGIN-NAME":"andy.yan@rock-chips.com","X-UNIQUE-TAG":"<649d83f6bdafe838fdbb6811db9dae95>","X-ATTACHMENT-NUM":"0","X-SENDER":"yxj@rock-chips.com","X-DNS-TYPE":"0","From":"Andy Yan ","To":"cyrille.pitchen@wedev4u.fr","Subject":"[PATCH v7 1/2] mtd: spi-nor: add a quad_enable callback in struct\n\tflash_info","Date":"Mon, 28 Aug 2017 09:58:29 +0800","Message-Id":"<1503885509-25335-1-git-send-email-andy.yan@rock-chips.com>","X-Mailer":"git-send-email 2.7.4","X-CRM114-Version":"20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ","X-CRM114-CacheID":"sfid-20170827_185934_070617_A9C62D98 ","X-CRM114-Status":"GOOD ( 11.81 )","X-Spam-Score":"-1.4 (-)","X-Spam-Report":"SpamAssassin version 3.4.1 on bombadil.infradead.org summary:\n\tContent analysis details: (-1.4 points)\n\tpts rule name description\n\t---- ----------------------\n\t--------------------------------------------------\n\t-0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at http://www.dnswl.org/,\n\tno trust [211.150.99.135 listed in list.dnswl.org]\n\t-2.8 RCVD_IN_MSPIKE_H2 RBL: Average reputation (+2)\n\t[211.150.99.135 listed in wl.mailspike.net]\n\t3.3 RCVD_IN_SBL_CSS RBL: Received via a relay in Spamhaus SBL-CSS\n\t[58.22.7.114 listed in zen.spamhaus.org]\n\t-0.0 SPF_PASS SPF: sender matches SPF record\n\t-1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n\t[score: 0.0000]","X-BeenThere":"linux-mtd@lists.infradead.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"Linux MTD discussion mailing list ","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"boris.brezillon@free-electrons.com, richard@nod.at,\n\tlinux-kernel@vger.kernel.org, marek.vasut@gmail.com,\n\tlinux-mtd@lists.infradead.org, Andy Yan ,\n\tcomputersforpeace@gmail.com, dwmw2@infradead.org","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"\"linux-mtd\" ","Errors-To":"linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"},"content":"Some manufacturers may use different bit to set QE on different\nmemories.\n\nThe GD25Q256 from GigaDevice is an example, which uses S6(bit 6\nof the Status Register-1) to set QE, which is different with\nother supported memories from GigaDevice that use S9(bit 1 of\nthe Status Register-2). This makes it is impossible to select\nthe quad enable method by distinguishing the MFR. This patch\nintroduce a quad_enable function which can be set per memory\nin the flash_info list table.\n\nSigned-off-by: Andy Yan \n\n---\n\nChanges in v7:\n- fix some typos.\n\nChanges in v6:\n- split the quad_enable callback to a single patch\n- adjust the columns per line of the commit message.\n\nChanges in v5:\n- set quad_enable in flash_info list, thanks the guidance by Cyrille.\n\nChanges in v4:\n- add SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB\n\nChanges in v3:\n- rebase on top of spi-nor tree\n- add SPI_NOR_4B_OPCODES flag\n\nChanges in v2:\n- drop one line unnecessary modification\n\n drivers/mtd/spi-nor/spi-nor.c | 11 +++++++++++\n 1 file changed, 11 insertions(+)","diff":"diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c\nindex cf1d4a1..3b94308 100644\n--- a/drivers/mtd/spi-nor/spi-nor.c\n+++ b/drivers/mtd/spi-nor/spi-nor.c\n@@ -89,6 +89,8 @@ struct flash_info {\n #define NO_CHIP_ERASE\t\tBIT(12) /* Chip does not support chip erase */\n #define SPI_NOR_SKIP_SFDP\tBIT(13)\t/* Skip parsing of SFDP tables */\n #define USE_CLSR\t\tBIT(14)\t/* use CLSR command */\n+\n+\tint\t(*quad_enable)(struct spi_nor *nor);\n };\n \n #define JEDEC_MFR(info)\t((info)->id[0])\n@@ -2388,6 +2390,15 @@ static int spi_nor_init_params(struct spi_nor *nor,\n \t\t\tparams->quad_enable = spansion_quad_enable;\n \t\t\tbreak;\n \t\t}\n+\n+\t\t/*\n+\t\t * Some manufacturer like GigaDevice may use different\n+\t\t * bit to set QE on different memories, so the MFR can't\n+\t\t * indicate the quad_enable method for this case, we need\n+\t\t * set it in flash info list.\n+\t\t */\n+\t\tif (info->quad_enable)\n+\t\t\tparams->quad_enable = info->quad_enable;\n \t}\n \n \t/* Override the parameters with data read from SFDP tables. */\n","prefixes":["v7","1/2"]}