{"id":806296,"url":"http://patchwork.ozlabs.org/api/1.0/patches/806296/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20170827192038.28930-1-mtparkr@gmail.com>","date":"2017-08-27T19:20:38","name":"[v3] audio: intel-hda: do not use old_mmio accesses","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a1b6a61732e9f62cc6e7c02b77c0795f95ae542f","submitter":{"id":72152,"url":"http://patchwork.ozlabs.org/api/1.0/people/72152/?format=json","name":"Matt Parker","email":"mtparkr@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20170827192038.28930-1-mtparkr@gmail.com/mbox/","series":[{"id":38,"url":"http://patchwork.ozlabs.org/api/1.0/series/38/?format=json","date":"2017-08-27T19:20:38","name":"[v3] audio: intel-hda: do not use old_mmio accesses","version":3,"mbox":"http://patchwork.ozlabs.org/series/38/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/806296/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@bilbo.ozlabs.org","Authentication-Results":["ozlabs.org;\n\tspf=pass (mailfrom) smtp.mailfrom=nongnu.org\n\t(client-ip=2001:4830:134:3::11; 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a=rsa-sha256; c=relaxed/relaxed;\n\td=1e100.net; s=20161025;\n\th=x-gm-message-state:from:to:cc:subject:date:message-id;\n\tbh=ks9N/f8EogfABe0Niz2UzQY4poxHnqJi2FF5vtciqN0=;\n\tb=Tp5rs7LMcMiQQ7QkpwboF2WEbcLC6rv/xjZi0xhgjzefVaUNAQLUam/UTFoleUDoUq\n\t4qJ6iP1BGOWo0vQWV20jJk6SrfoK+I21S0MYFT5G97Hbg5MLHpagJsr+amvi/cnzG9hF\n\tx1AVg2Om2KhyTZcXbM3RuMkhpYwqKOkOmVSm16sO4Gg0FyPCqaubnrAA00puiPgDzuKa\n\tDi980tGQ5jk0uYudQLabXcr0dLHcxTnY72uLn4l8e8HC5L7JWv42scAX1QDFPC471vta\n\tku03xVDI5N234jBDoR9/rS6BVS+FQIG+bwBLNVUPSjCWC8GUPYJPXMmAt+HsYm9akoDY\n\teFCA==","X-Gm-Message-State":"AHYfb5gbPihLZwzYcnrU3d2KtL0/cCesUzgGm8C6ttQ2r+CeFYb1BXrO\n\tKpMBEHZRaNBLvDMh","X-Received":"by 10.28.95.212 with SMTP id t203mr2248119wmb.56.1503861654626; \n\tSun, 27 Aug 2017 12:20:54 -0700 (PDT)","From":"Matt Parker ","To":"qemu-devel@nongnu.org","Date":"Sun, 27 Aug 2017 20:20:38 +0100","Message-Id":"<20170827192038.28930-1-mtparkr@gmail.com>","X-Mailer":"git-send-email 2.13.2","X-detected-operating-system":"by eggs.gnu.org: Genre and OS details not\n\trecognized.","X-Received-From":"2a00:1450:400c:c09::243","Subject":"[Qemu-devel] [PATCH v3] audio: intel-hda: do not use old_mmio\n\taccesses","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.21","Precedence":"list","List-Id":"","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Cc":"kraxel@redhat.com","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"\"Qemu-devel\"\n\t"},"content":"intel-hda is currently using the old_mmio accessors for io.\nThis updates the device to use .read and .write accessors instead.\n\nSigned-off-by: Matt Parker \n---\nv3:\n * use MAKE_64BIT_MASK\n---\n hw/audio/intel-hda.c | 58 ++++++++++------------------------------------------\n 1 file changed, 11 insertions(+), 47 deletions(-)","diff":"diff --git a/hw/audio/intel-hda.c b/hw/audio/intel-hda.c\nindex 06acc98f7b..18a50a8f83 100644\n--- a/hw/audio/intel-hda.c\n+++ b/hw/audio/intel-hda.c\n@@ -22,6 +22,7 @@\n #include \"hw/pci/pci.h\"\n #include \"hw/pci/msi.h\"\n #include \"qemu/timer.h\"\n+#include \"qemu/bitops.h\"\n #include \"hw/audio/soundhw.h\"\n #include \"intel-hda.h\"\n #include \"intel-hda-defs.h\"\n@@ -1043,66 +1044,29 @@ static void intel_hda_regs_reset(IntelHDAState *d)\n \n /* --------------------------------------------------------------------- */\n \n-static void intel_hda_mmio_writeb(void *opaque, hwaddr addr, uint32_t val)\n+static void intel_hda_mmio_write(void *opaque, hwaddr addr, uint64_t val,\n+ unsigned size)\n {\n IntelHDAState *d = opaque;\n const IntelHDAReg *reg = intel_hda_reg_find(d, addr);\n \n- intel_hda_reg_write(d, reg, val, 0xff);\n+ intel_hda_reg_write(d, reg, val, MAKE_64BIT_MASK(0, size * 8));\n }\n \n-static void intel_hda_mmio_writew(void *opaque, hwaddr addr, uint32_t val)\n+static uint64_t intel_hda_mmio_read(void *opaque, hwaddr addr, unsigned size)\n {\n IntelHDAState *d = opaque;\n const IntelHDAReg *reg = intel_hda_reg_find(d, addr);\n \n- intel_hda_reg_write(d, reg, val, 0xffff);\n-}\n-\n-static void intel_hda_mmio_writel(void *opaque, hwaddr addr, uint32_t val)\n-{\n- IntelHDAState *d = opaque;\n- const IntelHDAReg *reg = intel_hda_reg_find(d, addr);\n-\n- intel_hda_reg_write(d, reg, val, 0xffffffff);\n-}\n-\n-static uint32_t intel_hda_mmio_readb(void *opaque, hwaddr addr)\n-{\n- IntelHDAState *d = opaque;\n- const IntelHDAReg *reg = intel_hda_reg_find(d, addr);\n-\n- return intel_hda_reg_read(d, reg, 0xff);\n-}\n-\n-static uint32_t intel_hda_mmio_readw(void *opaque, hwaddr addr)\n-{\n- IntelHDAState *d = opaque;\n- const IntelHDAReg *reg = intel_hda_reg_find(d, addr);\n-\n- return intel_hda_reg_read(d, reg, 0xffff);\n-}\n-\n-static uint32_t intel_hda_mmio_readl(void *opaque, hwaddr addr)\n-{\n- IntelHDAState *d = opaque;\n- const IntelHDAReg *reg = intel_hda_reg_find(d, addr);\n-\n- return intel_hda_reg_read(d, reg, 0xffffffff);\n+ return intel_hda_reg_read(d, reg, MAKE_64BIT_MASK(0, size * 8));\n }\n \n static const MemoryRegionOps intel_hda_mmio_ops = {\n- .old_mmio = {\n- .read = {\n- intel_hda_mmio_readb,\n- intel_hda_mmio_readw,\n- intel_hda_mmio_readl,\n- },\n- .write = {\n- intel_hda_mmio_writeb,\n- intel_hda_mmio_writew,\n- intel_hda_mmio_writel,\n- },\n+ .read = intel_hda_mmio_read,\n+ .write = intel_hda_mmio_write,\n+ .impl = {\n+ .min_access_size = 1,\n+ .max_access_size = 4,\n },\n .endianness = DEVICE_NATIVE_ENDIAN,\n };\n","prefixes":["v3"]}