{"id":612,"url":"http://patchwork.ozlabs.org/api/1.0/patches/612/?format=json","project":{"id":1,"url":"http://patchwork.ozlabs.org/api/1.0/projects/1/?format=json","name":"Cell Broadband Engine development","link_name":"cbe-oss-dev","list_id":"cbe-oss-dev.ozlabs.org","list_email":"cbe-oss-dev@ozlabs.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<1221826522.4440.9.camel@localhost>","date":"2008-09-19T12:15:22","name":"[RFC] libspe2: add SPE_CPU_TYPE query to spe_cpu_info_get","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"2080308574d3ad79f8e27f774775c6d3b6ceac04","submitter":{"id":299,"url":"http://patchwork.ozlabs.org/api/1.0/people/299/?format=json","name":"D. Herrendoerfer","email":"d.herrendoerfer@herrendoerfer.name"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/cbe-oss-dev/patch/1221826522.4440.9.camel@localhost/mbox/","series":[],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/612/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":["patchwork-incoming@ozlabs.org","cbe-oss-dev@ozlabs.org"],"Delivered-To":["patchwork-incoming@ozlabs.org","cbe-oss-dev@ozlabs.org"],"Received":["from ozlabs.org (localhost [127.0.0.1])\n\tby ozlabs.org (Postfix) with ESMTP id 43A65DE0C9\n\tfor ;\n\tFri, 19 Sep 2008 22:16:50 +1000 (EST)","from mtagate8.de.ibm.com (mtagate8.de.ibm.com [195.212.29.157])\n\t(using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits))\n\t(Client CN \"mtagate8.de.ibm.com\", Issuer \"Equifax\" (verified OK))\n\tby ozlabs.org (Postfix) with ESMTPS id 22127DDF5E\n\tfor ; Fri, 19 Sep 2008 22:16:41 +1000 (EST)","from d12nrmr1607.megacenter.de.ibm.com\n\t(d12nrmr1607.megacenter.de.ibm.com [9.149.167.49])\n\tby mtagate8.de.ibm.com (8.13.8/8.13.8) with ESMTP id m8JCFsEv289224\n\tfor ; Fri, 19 Sep 2008 12:15:54 GMT","from d12av02.megacenter.de.ibm.com (d12av02.megacenter.de.ibm.com\n\t[9.149.165.228])\n\tby d12nrmr1607.megacenter.de.ibm.com (8.13.8/8.13.8/NCO v9.1) with\n\tESMTP id m8JCFiMC3239988\n\tfor ; Fri, 19 Sep 2008 14:15:53 +0200","from d12av02.megacenter.de.ibm.com (loopback [127.0.0.1])\n\tby d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.13.3) with ESMTP\n\tid m8JCFfqe027528\n\tfor ; Fri, 19 Sep 2008 14:15:41 +0200","from [9.152.216.53] (dyn-9-152-216-53.boeblingen.de.ibm.com\n\t[9.152.216.53])\n\tby d12av02.megacenter.de.ibm.com (8.12.11.20060308/8.12.11) with\n\tESMTP id m8JCFfdl027059\n\tfor ; Fri, 19 Sep 2008 14:15:41 +0200"],"From":"\"D. Herrendoerfer\" ","To":"CBE Development ","Date":"Fri, 19 Sep 2008 21:15:22 +0900","Message-Id":"<1221826522.4440.9.camel@localhost>","Mime-Version":"1.0","X-Mailer":"Evolution 2.8.3 (2.8.3-2.fc6) ","Subject":"[Cbe-oss-dev] [PATCH][RFC]libspe2: add SPE_CPU_TYPE query to\n\tspe_cpu_info_get","X-BeenThere":"cbe-oss-dev@ozlabs.org","X-Mailman-Version":"2.1.11","Precedence":"list","List-Id":"Discussion about Open Source Software for the Cell Broadband Engine\n\t","List-Unsubscribe":",\n\t","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n\t","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Sender":"cbe-oss-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org","Errors-To":"cbe-oss-dev-bounces+patchwork-incoming=ozlabs.org@ozlabs.org"},"content":"This patch adds the SPE_CPU_TYPE query to the\nspe_cpu_info_get() function. The list of EDP\ncapable CPUs is quite short, if anyone has \nmore information about PVR values please send them\nto me.\n\nSigned-off-by: D.Herrendoerfer ","diff":"Index: libspe2/spebase/info.h\n===================================================================\n--- libspe2/spebase/info.h\t(revision 133)\n+++ libspe2/spebase/info.h\t(working copy)\n@@ -27,5 +27,12 @@\n int _base_spe_count_physical_cpus(int cpu_node);\n int _base_spe_count_physical_spes(int cpu_node);\n int _base_spe_count_usable_spes(int cpu_node);\n+int _base_spe_read_cpu_type(int cpu_node);\n+\n+/* Here is a list of edp capable PVRs\n+ * Known non-EDP are: 0x0070 0501 ( PS3, QS20, QS21 )\n+ * Known EPD capable: 0x0070 3000 ( QS22 )\n+ */\n+unsigned long pvr_list_edp[] = {0x00703000, 0};\n \n #endif\nIndex: libspe2/spebase/info.c\n===================================================================\n--- libspe2/spebase/info.c\t(revision 133)\n+++ libspe2/spebase/info.c\t(working copy)\n@@ -103,6 +103,24 @@ int _base_spe_count_physical_spes(int cp\n \treturn ret;\n }\n \n+/* Since there are no mixed-type CPU systems at this time the cpu node\n+ * is currently ignored, and a result is generated that returns the \n+ * feature set of the currently running CPU.\n+ */\n+int _base_spe_read_cpu_type(int cpu_node)\n+{\n+\tunsigned long pvr;\n+\tint i=0;\n+\t\n+\tasm volatile (\"mfpvr %0\" : \"=r\"(pvr));\n+\t\n+\twhile (pvr_list_edp[i] != 0) {\n+\t\tif (pvr_list_edp[i++] == pvr)\n+\t\t\treturn SPE_CPU_IS_CELLEDP;\n+\t}\n+\t\n+\treturn SPE_CPU_IS_CELLBE;\n+}\n \n int _base_spe_cpu_info_get(int info_requested, int cpu_node) {\n \tint ret = 0;\n@@ -118,6 +136,9 @@ int _base_spe_cpu_info_get(int info_requ\n \tcase SPE_COUNT_USABLE_SPES:\n \t\tret = _base_spe_count_usable_spes(cpu_node);\n \t\tbreak;\n+\tcase SPE_CPU_TYPE:\n+\t\tret = (_base_spe_read_cpu_type(cpu_node) == 0);\n+\t\tbreak;\n \tdefault:\n \t\terrno = EINVAL;\n \t\tret = -1;\nIndex: libspe2/libspe2-types.h\n===================================================================\n--- libspe2/libspe2-types.h\t(revision 133)\n+++ libspe2/libspe2-types.h\t(working copy)\n@@ -262,10 +262,13 @@ enum ps_area { SPE_MSSYNC_AREA, SPE_MFC_\n #define SPE_CALLBACK_UPDATE 2\n \n \n-\n #define SPE_COUNT_PHYSICAL_CPU_NODES 1\n #define SPE_COUNT_PHYSICAL_SPES 2\n #define SPE_COUNT_USABLE_SPES 3\n+#define SPE_CPU_TYPE 4\n+\n+#define SPE_CPU_IS_CELLBE 1\n+#define SPE_CPU_IS_CELLEDP 2\n \n /**\n * Signal Targets \n","prefixes":["RFC"]}