{"id":611,"url":"http://patchwork.ozlabs.org/api/1.0/patches/611/?format=json","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/1.0/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20080919120752.GA19877@linux-mips.org>","date":"2008-09-19T12:07:52","name":"[PATCH] MIPS checksum fix","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":true,"hash":"440f35e5b16bfd89f82e98fd346a2c3515f234dd","submitter":{"id":297,"url":"http://patchwork.ozlabs.org/api/1.0/people/297/?format=json","name":"Ralf Baechle","email":"ralf@linux-mips.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/20080919120752.GA19877@linux-mips.org/mbox/","series":[],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/611/checks/","tags":{},"headers":{"Return-Path":"<netdev-owner@vger.kernel.org>","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Received":["from vger.kernel.org (vger.kernel.org [209.132.176.167])\n\tby ozlabs.org (Postfix) with ESMTP id 61142DDEE2\n\tfor <patchwork-incoming@ozlabs.org>;\n\tFri, 19 Sep 2008 22:09:59 +1000 (EST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1751227AbYISMJy (ORCPT <rfc822;patchwork-incoming@ozlabs.org>);\n\tFri, 19 Sep 2008 08:09:54 -0400","(majordomo@vger.kernel.org) by vger.kernel.org id S1751027AbYISMJx\n\t(ORCPT <rfc822; netdev-outgoing>); Fri, 19 Sep 2008 08:09:53 -0400","from ftp.linux-mips.org ([213.58.128.207]:51003 \"EHLO\n\tftp.linux-mips.org\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1750987AbYISMJx (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Fri, 19 Sep 2008 08:09:53 -0400","from localhost.localdomain ([127.0.0.1]:51421 \"EHLO\n\tditditdahdahdah-dahdahdahditdit.dl5rb.org.uk\") by ftp.linux-mips.org\n\twith ESMTP id S20316669AbYISMH6 (ORCPT\n\t<rfc822;netdev@vger.kernel.org>); Fri, 19 Sep 2008 13:07:58 +0100","from denk.linux-mips.net (denk.linux-mips.net [127.0.0.1])\n\tby ditditdahdahdah-dahdahdahditdit.dl5rb.org.uk (8.14.2/8.14.1) with\n\tESMTP id m8JC7rWK019907; Fri, 19 Sep 2008 14:07:53 +0200","(from ralf@localhost)\n\tby denk.linux-mips.net (8.14.2/8.14.2/Submit) id m8JC7qV9019905;\n\tFri, 19 Sep 2008 14:07:52 +0200"],"Date":"Fri, 19 Sep 2008 14:07:52 +0200","From":"Ralf Baechle <ralf@linux-mips.org>","To":"\"Maciej W. Rozycki\" <macro@linux-mips.org>","Cc":"Atsushi Nemoto <anemo@mba.ocn.ne.jp>, u1@terran.org,\n\tlinux-mips@linux-mips.org, netdev@vger.kernel.org","Subject":"Re: [PATCH] MIPS checksum fix","Message-ID":"<20080919120752.GA19877@linux-mips.org>","References":"<Pine.LNX.4.55.0809171104290.17103@cliff.in.clinika.pl>\n\t<20080917.222350.41199051.anemo@mba.ocn.ne.jp>\n\t<Pine.LNX.4.55.0809171501450.17103@cliff.in.clinika.pl>\n\t<20080918.002705.78730226.anemo@mba.ocn.ne.jp>\n\t<Pine.LNX.4.55.0809171917580.17103@cliff.in.clinika.pl>\n\t<20080918220734.GA19222@linux-mips.org>\n\t<Pine.LNX.4.55.0809190112090.22686@cliff.in.clinika.pl>\n\t<20080919112304.GB13440@linux-mips.org>\n\t<20080919114743.GA19359@linux-mips.org>","MIME-Version":"1.0","Content-Type":"text/plain; charset=us-ascii","Content-Disposition":"inline","In-Reply-To":"<20080919114743.GA19359@linux-mips.org>","User-Agent":"Mutt/1.5.18 (2008-05-17)","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"<netdev.vger.kernel.org>","X-Mailing-List":"netdev@vger.kernel.org"},"content":"On Fri, Sep 19, 2008 at 01:47:43PM +0200, Ralf Baechle wrote:\n\n> I'm interested in test reports of this on all sorts of configurations -\n> 32-bit, 64-bit, big / little endian, R2 processors and pre-R2.  In\n> particular Cavium being the only MIPS64 R2 implementation would be\n> interesting.  This definately is stuff which should go upstream for 2.6.27.\n\nThere was a trivial bug in the R2 code.\n\nFrom 97ad23f4696a322cb3bc379a25a8c0f6526751d6 Mon Sep 17 00:00:00 2001\nFrom: Ralf Baechle <ralf@linux-mips.org>\nDate: Fri, 19 Sep 2008 14:05:53 +0200\nSubject: [PATCH] [MIPS] Fix 64-bit csum_partial, __csum_partial_copy_user and csum_partial_copy\n\nOn 64-bit machines it wouldn't handle a possible carry when adding the\n32-bit folded checksum and checksum argument.\n\nWhile at it, add a few trivial optimizations, also for R2 processors.\n\nSigned-off-by: Ralf Baechle <ralf@linux-mips.org>","diff":"diff --git a/arch/mips/lib/csum_partial.S b/arch/mips/lib/csum_partial.S\nindex 8d77841..c77a7a0 100644\n--- a/arch/mips/lib/csum_partial.S\n+++ b/arch/mips/lib/csum_partial.S\n@@ -53,12 +53,14 @@\n #define UNIT(unit)  ((unit)*NBYTES)\n \n #define ADDC(sum,reg)\t\t\t\t\t\t\\\n-\t.set\tpush;\t\t\t\t\t\t\\\n-\t.set\tnoat;\t\t\t\t\t\t\\\n \tADD\tsum, reg;\t\t\t\t\t\\\n \tsltu\tv1, sum, reg;\t\t\t\t\t\\\n \tADD\tsum, v1;\t\t\t\t\t\\\n-\t.set\tpop\n+\n+#define ADDC32(sum,reg)\t\t\t\t\t\t\\\n+\taddu\tsum, reg;\t\t\t\t\t\\\n+\tsltu\tv1, sum, reg;\t\t\t\t\t\\\n+\taddu\tsum, v1;\t\t\t\t\t\\\n \n #define CSUM_BIGCHUNK1(src, offset, sum, _t0, _t1, _t2, _t3)\t\\\n \tLOAD\t_t0, (offset + UNIT(0))(src);\t\t\t\\\n@@ -254,8 +256,6 @@ LEAF(csum_partial)\n 1:\tADDC(sum, t1)\n \n \t/* fold checksum */\n-\t.set\tpush\n-\t.set\tnoat\n #ifdef USE_DOUBLE\n \tdsll32\tv1, sum, 0\n \tdaddu\tsum, v1\n@@ -263,24 +263,25 @@ LEAF(csum_partial)\n \tdsra32\tsum, sum, 0\n \taddu\tsum, v1\n #endif\n-\tsll\tv1, sum, 16\n-\taddu\tsum, v1\n-\tsltu\tv1, sum, v1\n-\tsrl\tsum, sum, 16\n-\taddu\tsum, v1\n \n \t/* odd buffer alignment? */\n-\tbeqz\tt7, 1f\n-\t nop\n-\tsll\tv1, sum, 8\n+#ifdef CPU_MIPSR2\n+\twsbh\tv1, sum\t\n+\tmovn\tsum, v1, t7\n+#else\n+\tbeqz\tt7, 1f\t\t\t/* odd buffer alignment? */\n+\t lui\tv1, 0x00ff\n+\taddu\tv1, 0x00ff\n+\tand\tt0, sum, v1\n+\tsll\tt0, t0, 8\n \tsrl\tsum, sum, 8\n-\tor\tsum, v1\n-\tandi\tsum, 0xffff\n-\t.set\tpop\n+\tand\tsum, sum, v1\n+\tor\tsum, sum, t0\n 1:\n+#endif\n \t.set\treorder\n \t/* Add the passed partial csum.  */\n-\tADDC(sum, a2)\n+\tADDC32(sum, a2)\n \tjr\tra\n \t.set\tnoreorder\n \tEND(csum_partial)\n@@ -656,8 +657,6 @@ EXC(\tsb\tt0, NBYTES-2(dst), .Ls_exc)\n \tADDC(sum, t2)\n .Ldone:\n \t/* fold checksum */\n-\t.set\tpush\n-\t.set\tnoat\n #ifdef USE_DOUBLE\n \tdsll32\tv1, sum, 0\n \tdaddu\tsum, v1\n@@ -665,23 +664,23 @@ EXC(\tsb\tt0, NBYTES-2(dst), .Ls_exc)\n \tdsra32\tsum, sum, 0\n \taddu\tsum, v1\n #endif\n-\tsll\tv1, sum, 16\n-\taddu\tsum, v1\n-\tsltu\tv1, sum, v1\n-\tsrl\tsum, sum, 16\n-\taddu\tsum, v1\n \n-\t/* odd buffer alignment? */\n-\tbeqz\todd, 1f\n-\t nop\n-\tsll\tv1, sum, 8\n+#ifdef CPU_MIPSR2\n+\twsbh\tv1, sum\n+\tmovn\tsum, v1, odd\n+#else\n+\tbeqz\todd, 1f\t\t\t/* odd buffer alignment? */\n+\t lui\tv1, 0x00ff\n+\taddu\tv1, 0x00ff\n+\tand\tt0, sum, v1\n+\tsll\tt0, t0, 8\n \tsrl\tsum, sum, 8\n-\tor\tsum, v1\n-\tandi\tsum, 0xffff\n-\t.set\tpop\n+\tand\tsum, sum, v1\n+\tor\tsum, sum, t0\n 1:\n+#endif\n \t.set reorder\n-\tADDC(sum, psum)\n+\tADDC32(sum, psum)\n \tjr\tra\n \t.set noreorder\n \n","prefixes":[]}