{"id":559,"url":"http://patchwork.ozlabs.org/api/1.0/patches/559/?format=json","project":{"id":7,"url":"http://patchwork.ozlabs.org/api/1.0/projects/7/?format=json","name":"Linux network development","link_name":"netdev","list_id":"netdev.vger.kernel.org","list_email":"netdev@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<1221777686-6181-1-git-send-email-vgallardo@amcc.com>","date":"2008-09-18T22:41:26","name":"ibm_newemac: Fix EMAC soft reset on 460EX/GT","commit_ref":null,"pull_url":null,"state":"accepted","archived":true,"hash":"3d03c5f960f6e6f87c296596fec9c91d85597601","submitter":{"id":111,"url":"http://patchwork.ozlabs.org/api/1.0/people/111/?format=json","name":"Victor Gallardo","email":"vgallardo@amcc.com"},"delegate":{"id":36,"url":"http://patchwork.ozlabs.org/api/1.0/users/36/?format=json","username":"jgarzik","first_name":"Jeff","last_name":"Garzik","email":"jgarzik@pobox.com"},"mbox":"http://patchwork.ozlabs.org/project/netdev/patch/1221777686-6181-1-git-send-email-vgallardo@amcc.com/mbox/","series":[],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/559/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"patchwork-incoming@ozlabs.org","Delivered-To":"patchwork-incoming@ozlabs.org","Received":["from vger.kernel.org (vger.kernel.org [209.132.176.167])\n\tby ozlabs.org (Postfix) with ESMTP id C2BEBDDFCA\n\tfor ;\n\tFri, 19 Sep 2008 08:41:45 +1000 (EST)","(majordomo@vger.kernel.org) by vger.kernel.org via listexpand\n\tid S1755018AbYIRWlf (ORCPT );\n\tThu, 18 Sep 2008 18:41:35 -0400","(majordomo@vger.kernel.org) by vger.kernel.org id S1755021AbYIRWle\n\t(ORCPT ); Thu, 18 Sep 2008 18:41:34 -0400","from sdcmail02.amcc.com ([198.137.200.73]:9880 \"EHLO\n\tsdcmail02.amcc.com\" rhost-flags-OK-OK-OK-OK) by vger.kernel.org\n\twith ESMTP id S1755014AbYIRWle (ORCPT\n\t); Thu, 18 Sep 2008 18:41:34 -0400","from sdcexch01.amcc.com (HELO sdcexchange01.amcc.com)\n\t([10.64.18.50])\n\tby sdcmail02-int1.amcc.com with ESMTP; 18 Sep 2008 15:41:33 -0700","from amcc.com ([10.66.12.74]) by sdcexchange01.amcc.com with\n\tMicrosoft SMTPSVC(6.0.3790.3959); Thu, 18 Sep 2008 15:41:31 -0700","(from vgallard@localhost)\n\tby amcc.com (8.13.8/8.12.2/Submit) id m8IMfQML006202;\n\tThu, 18 Sep 2008 15:41:26 -0700"],"X-IronPort-AV":"E=Sophos;i=\"4.32,424,1217833200\"; d=\"scan'208\";a=\"1394550\"","From":"Victor Gallardo ","To":"linuxppc-dev@ozlabs.org, netdev@vger.kernel.org","Cc":"benh@kernel.crashing.org, jwboyer@linux.vnet.ibm.com,\n\tfkan@amcc.com, Victor Gallardo ","Subject":"[PATCH] ibm_newemac: Fix EMAC soft reset on 460EX/GT","Date":"Thu, 18 Sep 2008 15:41:26 -0700","Message-Id":"<1221777686-6181-1-git-send-email-vgallardo@amcc.com>","X-Mailer":"git-send-email 1.5.5","X-OriginalArrivalTime":"18 Sep 2008 22:41:32.0530 (UTC)\n\tFILETIME=[B2D25520:01C919DF]","Sender":"netdev-owner@vger.kernel.org","Precedence":"bulk","List-ID":"","X-Mailing-List":"netdev@vger.kernel.org"},"content":"This patch fixes EMAC soft reset on 460EX/GT when no external clock is\navailable.\n\nSigned-off-by: Victor Gallardo ","diff":"diff --git a/arch/powerpc/include/asm/dcr-regs.h b/arch/powerpc/include/asm/dcr-regs.h\nindex 29b0ece..f15296c 100644\n--- a/arch/powerpc/include/asm/dcr-regs.h\n+++ b/arch/powerpc/include/asm/dcr-regs.h\n@@ -68,6 +68,10 @@\n #define SDR0_UART3\t\t0x0123\n #define SDR0_CUST0\t\t0x4000\n \n+/* SDRs (460EX/460GT) */\n+#define SDR0_ETH_CFG\t\t0x4103\n+#define SDR0_ETH_CFG_ECS\t0x00000100\t/* EMAC int clk source */\n+\n /*\n * All those DCR register addresses are offsets from the base address\n * for the SRAM0 controller (e.g. 0x20 on 440GX). The base address is\ndiff --git a/drivers/net/ibm_newemac/core.c b/drivers/net/ibm_newemac/core.c\nindex 2e720f2..f6871ba 100644\n--- a/drivers/net/ibm_newemac/core.c\n+++ b/drivers/net/ibm_newemac/core.c\n@@ -130,6 +130,7 @@ static inline void emac_report_timeout_error(struct emac_instance *dev,\n \t\t\t\t\t const char *error)\n {\n \tif (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX |\n+\t\t\t\t EMAC_FTR_460EX_PHY_CLK_FIX |\n \t\t\t\t EMAC_FTR_440EP_PHY_CLK_FIX))\n \t\tDBG(dev, \"%s\" NL, error);\n \telse if (net_ratelimit())\n@@ -351,10 +352,24 @@ static int emac_reset(struct emac_instance *dev)\n \t\temac_tx_disable(dev);\n \t}\n \n+#ifdef CONFIG_PPC_DCR_NATIVE\n+\t/* Enable internal clock source */\n+\tif (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX))\n+\t\tdcri_clrset(SDR0, SDR0_ETH_CFG,\n+\t\t\t 0, SDR0_ETH_CFG_ECS << dev->cell_index);\n+#endif\n+\n \tout_be32(&p->mr0, EMAC_MR0_SRST);\n \twhile ((in_be32(&p->mr0) & EMAC_MR0_SRST) && n)\n \t\t--n;\n \n+#ifdef CONFIG_PPC_DCR_NATIVE\n+\t /* Enable external clock source */\n+\tif (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX))\n+\t\tdcri_clrset(SDR0, SDR0_ETH_CFG,\n+\t\t\t SDR0_ETH_CFG_ECS << dev->cell_index, 0);\n+#endif\n+\n \tif (n) {\n \t\tdev->reset_failed = 0;\n \t\treturn 0;\n@@ -2559,6 +2574,9 @@ static int __devinit emac_init_config(struct emac_instance *dev)\n \t/* Check EMAC version */\n \tif (of_device_is_compatible(np, \"ibm,emac4sync\")) {\n \t\tdev->features |= (EMAC_FTR_EMAC4 | EMAC_FTR_EMAC4SYNC);\n+\t\tif (of_device_is_compatible(np, \"ibm,emac-460ex\") ||\n+\t\t of_device_is_compatible(np, \"ibm,emac-460gt\"))\n+\t\t\tdev->features |= EMAC_FTR_460EX_PHY_CLK_FIX;\n \t} else if (of_device_is_compatible(np, \"ibm,emac4\")) {\n \t\tdev->features |= EMAC_FTR_EMAC4;\n \t\tif (of_device_is_compatible(np, \"ibm,emac-440gx\"))\ndiff --git a/drivers/net/ibm_newemac/core.h b/drivers/net/ibm_newemac/core.h\nindex 6545e69..5ca70e5 100644\n--- a/drivers/net/ibm_newemac/core.h\n+++ b/drivers/net/ibm_newemac/core.h\n@@ -317,6 +317,10 @@ struct emac_instance {\n * The 405EX and 460EX contain the EMAC4SYNC core\n */\n #define EMAC_FTR_EMAC4SYNC\t\t0x00000200\n+/*\n+ * Set if we need phy clock workaround for 460ex or 460gt\n+ */\n+#define EMAC_FTR_460EX_PHY_CLK_FIX\t0x00000400\n \n \n /* Right now, we don't quite handle the always/possible masks on the\n@@ -341,6 +345,7 @@ enum {\n #ifdef CONFIG_IBM_NEW_EMAC_RGMII\n \t EMAC_FTR_HAS_RGMII\t|\n #endif\n+\tEMAC_FTR_460EX_PHY_CLK_FIX |\n \tEMAC_FTR_440EP_PHY_CLK_FIX,\n };\n \n","prefixes":[]}