{"id":2223081,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2223081/?format=json","project":{"id":17,"url":"http://patchwork.ozlabs.org/api/1.0/projects/17/?format=json","name":"GNU Compiler Collection","link_name":"gcc","list_id":"gcc-patches.gcc.gnu.org","list_email":"gcc-patches@gcc.gnu.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<b5119df8-a47c-4d35-8228-6d3f9386d808@linux.ibm.com>","date":"2026-04-14T11:34:11","name":"[v2] rs6000: Fix PTImode attribute handling [PR106895]","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"d69b1bc01d88b50443a2d73a30dec8a2f96e8440","submitter":{"id":88218,"url":"http://patchwork.ozlabs.org/api/1.0/people/88218/?format=json","name":"jeevitha","email":"jeevitha@linux.ibm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/gcc/patch/b5119df8-a47c-4d35-8228-6d3f9386d808@linux.ibm.com/mbox/","series":[{"id":499822,"url":"http://patchwork.ozlabs.org/api/1.0/series/499822/?format=json","date":"2026-04-14T11:34:11","name":"[v2] rs6000: Fix PTImode attribute handling [PR106895]","version":2,"mbox":"http://patchwork.ozlabs.org/series/499822/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2223081/checks/","tags":{},"headers":{"Return-Path":"<gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org>","X-Original-To":["incoming@patchwork.ozlabs.org","gcc-patches@gcc.gnu.org"],"Delivered-To":["patchwork-incoming@legolas.ozlabs.org","gcc-patches@gcc.gnu.org"],"Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=WbYBuvyU;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=gcc.gnu.org\n (client-ip=2620:52:6:3111::32; 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charset=UTF-8","Content-Transfer-Encoding":"7bit","X-TM-AS-GCONF":"00","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDE0MDEwNSBTYWx0ZWRfX+HkG8SJ2ThiH\n ZvXffCT4+p+QbsLbB9ihJS7wiYDkbD53o2LhvTLy+WyLeuIO1zITS/wtOgdOckPvoKJr7pcsth0\n S7YmZ1O6bnjCUsTpk1HlR4w417LBZy7FChBl8w7Cup5SNWdmv0xLSqzaBmnuYwh3AuBcpumsWtI\n 2623osJgctJGT9dLVAg6J8wbt5wwuvYbgpJJK5NdDReV9542xHNuvUktfak6nWNObIBnSldkEtA\n p9kIEmnaom9VN1XJZ+JjXTyS0TDv2yt1t3n4339cDr8hSiUg18Bb4tqiS/m38gzDqpNGsan9IR9\n 5B2nTZ2Su51LLoZLar62jQ+AvmMw+RUCBkjYykw4aiQUtpATn5wDZ/7udhMN6+dq6uGpLSkMwVF\n XZ/pkLyP6VXw622NQXRbNdIu5wo6AUgi2HfQgBC/ROSu98Id8tJQEqvvkpUwHsgsy5kylxx22bi\n UwCfbS6aj/MCoVvL0Dg==","X-Proofpoint-ORIG-GUID":"bXGGYe0P0fHVnDP1DMuDvG2NuH9XKee-","X-Proofpoint-GUID":"bXGGYe0P0fHVnDP1DMuDvG2NuH9XKee-","X-Authority-Analysis":"v=2.4 cv=fYidDUQF c=1 sm=1 tr=0 ts=69de263a cx=c_pps\n a=5BHTudwdYE3Te8bg5FgnPg==:117 a=5BHTudwdYE3Te8bg5FgnPg==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=RnoormkPH1_aCDwRdu11:22 a=U7nrCbtTmkRpXpFmAIza:22 a=VnNF1IyMAAAA:8\n a=qragHlggf3eVdwpAFs8A:9 a=QEXdDO2ut3YA:10","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-14_03,2026-04-13_04,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n adultscore=0 impostorscore=0 clxscore=1015 malwarescore=0 phishscore=0\n bulkscore=0 priorityscore=1501 spamscore=0 suspectscore=0 lowpriorityscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2604070000 definitions=main-2604140105","X-BeenThere":"gcc-patches@gcc.gnu.org","X-Mailman-Version":"2.1.30","Precedence":"list","List-Id":"Gcc-patches mailing list <gcc-patches.gcc.gnu.org>","List-Unsubscribe":"<https://gcc.gnu.org/mailman/options/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=unsubscribe>","List-Archive":"<https://gcc.gnu.org/pipermail/gcc-patches/>","List-Post":"<mailto:gcc-patches@gcc.gnu.org>","List-Help":"<mailto:gcc-patches-request@gcc.gnu.org?subject=help>","List-Subscribe":"<https://gcc.gnu.org/mailman/listinfo/gcc-patches>,\n <mailto:gcc-patches-request@gcc.gnu.org?subject=subscribe>","Errors-To":"gcc-patches-bounces~incoming=patchwork.ozlabs.org@gcc.gnu.org"},"content":"Hi All,\n\nThe following patch has been bootstrapped and regtested on powerpc64le-linux.\n\nChanges from V1:\n* Added new test pr106895-2.c.\n\nPTImode is used to generate even/odd register pairs for 128-bit values.\nWhen PTImode is specified via a type attribute, compilation fails\nbecause no internal type exists to represent this mode.\n\nIntroduce signed and unsigned PTImode internal builtin types to handle\nPTImode. These __pti_internal types are not documented, as they are not\nintended for direct user use.\n\n2026-04-14  Jeevitha Palanisamy  <jeevitha@linux.ibm.com>\n\ngcc/\n\tPR target/106895\n\t* config/rs6000/rs6000.h (enum rs6000_builtin_type_index): Add\n\tRS6000_BTI_INTPTI and RS6000_BTI_UINTPTI.\n\t(intPTI_type_internal_node, uintPTI_type_internal_node): New\n\tPTImode type macros.\n\t* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Register\n\tsigned and unsigned PTImode internal builtin types.\n\t* config/rs6000/sync.md (trunctipti2): New splitter.\n\t(extendptiti2): Likewise.\n\t(zero_extendptiti2): Likewise.\n\ngcc/testsuite/\n\tPR target/106895\n\t* gcc.target/powerpc/pr106895-1.c: New test.\n\t* gcc.target/powerpc/pr106895-2.c: New test.","diff":"diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc\nindex bbf60de3b1b..8561cd67f53 100644\n--- a/gcc/config/rs6000/rs6000-builtin.cc\n+++ b/gcc/config/rs6000/rs6000-builtin.cc\n@@ -756,6 +756,19 @@ rs6000_init_builtins (void)\n   else\n     ieee128_float_type_node = NULL_TREE;\n \n+  /* PTImode to get even/odd register pairs.  */\n+  intPTI_type_internal_node = make_signed_type (GET_MODE_BITSIZE (PTImode));\n+  SET_TYPE_MODE (intPTI_type_internal_node, PTImode);\n+  t = build_qualified_type (intPTI_type_internal_node, TYPE_QUAL_CONST);\n+  lang_hooks.types.register_builtin_type (intPTI_type_internal_node,\n+\t\t\t\t\t  \"__pti_internal\");\n+\n+  uintPTI_type_internal_node = make_unsigned_type (GET_MODE_BITSIZE (PTImode));\n+  SET_TYPE_MODE (uintPTI_type_internal_node, PTImode);\n+  t = build_qualified_type (uintPTI_type_internal_node, TYPE_QUAL_CONST);\n+  lang_hooks.types.register_builtin_type (uintPTI_type_internal_node,\n+\t\t\t\t\t  \"__upti_internal\");\n+\n   /* Vector pair and vector quad support.  */\n   vector_pair_type_node = make_node (OPAQUE_TYPE);\n   SET_TYPE_MODE (vector_pair_type_node, OOmode);\ndiff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h\nindex 2b90694cef1..d85f71aa65d 100644\n--- a/gcc/config/rs6000/rs6000.h\n+++ b/gcc/config/rs6000/rs6000.h\n@@ -2285,6 +2285,8 @@ enum rs6000_builtin_type_index\n   RS6000_BTI_ptr_vector_quad,\n   RS6000_BTI_ptr_long_long,\n   RS6000_BTI_ptr_long_long_unsigned,\n+  RS6000_BTI_INTPTI,\n+  RS6000_BTI_UINTPTI,\n   RS6000_BTI_MAX\n };\n \n@@ -2329,6 +2331,8 @@ enum rs6000_builtin_type_index\n #define uintDI_type_internal_node\t (rs6000_builtin_types[RS6000_BTI_UINTDI])\n #define intTI_type_internal_node\t (rs6000_builtin_types[RS6000_BTI_INTTI])\n #define uintTI_type_internal_node\t (rs6000_builtin_types[RS6000_BTI_UINTTI])\n+#define intPTI_type_internal_node\t (rs6000_builtin_types[RS6000_BTI_INTPTI])\n+#define uintPTI_type_internal_node\t (rs6000_builtin_types[RS6000_BTI_UINTPTI])\n #define float_type_internal_node\t (rs6000_builtin_types[RS6000_BTI_float])\n #define double_type_internal_node\t (rs6000_builtin_types[RS6000_BTI_double])\n #define long_double_type_internal_node\t (rs6000_builtin_types[RS6000_BTI_long_double])\ndiff --git a/gcc/config/rs6000/sync.md b/gcc/config/rs6000/sync.md\nindex 7087daf7e4c..4e392584bbc 100644\n--- a/gcc/config/rs6000/sync.md\n+++ b/gcc/config/rs6000/sync.md\n@@ -198,6 +198,54 @@\n   DONE;\n })\n \n+;; PTI and TI are both 128-bit modes; the following conversions are\n+;; register-class changes only, no actual truncation, sign or zero\n+;; extension occurs.\n+(define_insn_and_split \"trunctipti2\"\n+  [(set (match_operand:PTI 0 \"register_operand\" \"=r\")\n+        (truncate:PTI (match_operand:TI 1 \"register_operand\" \"r\")))]\n+  \"\"\n+  \"#\"\n+  \"&& reload_completed\"\n+  [(set (match_dup 2) (match_dup 4))\n+   (set (match_dup 3) (match_dup 5))]\n+{\n+  operands[2] = gen_lowpart (DImode, operands[0]);\n+  operands[3] = gen_highpart (DImode, operands[0]);\n+  operands[4] = gen_lowpart (DImode, operands[1]);\n+  operands[5] = gen_highpart (DImode, operands[1]);\n+})\n+\n+(define_insn_and_split \"extendptiti2\"\n+  [(set (match_operand:TI 0 \"register_operand\" \"=r\")\n+        (sign_extend:TI (match_operand:PTI 1 \"register_operand\" \"r\")))]\n+  \"\"\n+  \"#\"\n+  \"&& reload_completed\"\n+  [(set (match_dup 2) (match_dup 4))\n+   (set (match_dup 3) (match_dup 5))]\n+{\n+  operands[2] = gen_lowpart (DImode, operands[0]);\n+  operands[3] = gen_highpart (DImode, operands[0]);\n+  operands[4] = gen_lowpart (DImode, operands[1]);\n+  operands[5] = gen_highpart (DImode, operands[1]);\n+})\n+\n+(define_insn_and_split \"zero_extendptiti2\"\n+  [(set (match_operand:TI 0 \"register_operand\" \"=r\")\n+        (zero_extend:TI (match_operand:PTI 1 \"register_operand\" \"r\")))]\n+  \"\"\n+  \"#\"\n+  \"&& reload_completed\"\n+  [(set (match_dup 2) (match_dup 4))\n+   (set (match_dup 3) (match_dup 5))]\n+{\n+  operands[2] = gen_lowpart (DImode, operands[0]);\n+  operands[3] = gen_highpart (DImode, operands[0]);\n+  operands[4] = gen_lowpart (DImode, operands[1]);\n+  operands[5] = gen_highpart (DImode, operands[1]);\n+})\n+\n ;; If TARGET_PREFIXED, always use pstq rather than stq.\n (define_insn \"store_quadpti\"\n   [(set (match_operand:PTI 0 \"quad_memory_operand\" \"=wQ\")\ndiff --git a/gcc/testsuite/gcc.target/powerpc/pr106895-1.c b/gcc/testsuite/gcc.target/powerpc/pr106895-1.c\nnew file mode 100644\nindex 00000000000..dfcafcd57e7\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/pr106895-1.c\n@@ -0,0 +1,16 @@\n+/* PR target/106895 */\n+/* { dg-do assemble } */\n+/* { dg-require-effective-target int128 } */\n+/* { dg-options \"-O2 -save-temps\" } */\n+\n+/* Verify the following generates even/odd register pairs.  */\n+\n+typedef __int128 pti __attribute__((mode(PTI)));\n+\n+void\n+set128 (pti val, pti *mem)\n+{\n+  asm (\"stq %1,%0\" : \"=m\" (*mem) : \"r\" (val));\n+}\n+\n+/* { dg-final { scan-assembler {\\mstq\\M} } } */\ndiff --git a/gcc/testsuite/gcc.target/powerpc/pr106895-2.c b/gcc/testsuite/gcc.target/powerpc/pr106895-2.c\nnew file mode 100644\nindex 00000000000..7a197ff65cf\n--- /dev/null\n+++ b/gcc/testsuite/gcc.target/powerpc/pr106895-2.c\n@@ -0,0 +1,21 @@\n+/* PR target/106895 */\n+/* { dg-do run } */\n+/* { dg-require-effective-target int128 } */\n+/* { dg-options \"-O2\" } */\n+\n+#include <stdlib.h>\n+\n+typedef __int128 ti;\n+typedef __int128 pti __attribute__((mode(PTI)));\n+\n+int main(void)\n+{\n+  ti a = 140;\n+  pti b = (pti) a;\n+  ti c = (ti) b;\n+\n+  if (c != a)\n+    abort();\n+\n+  return 0;\n+}\n","prefixes":["v2"]}