{"id":2221250,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2221250/?format=json","project":{"id":57,"url":"http://patchwork.ozlabs.org/api/1.0/projects/57/?format=json","name":"Linux ASPEED SoC development","link_name":"linux-aspeed","list_id":"linux-aspeed.lists.ozlabs.org","list_email":"linux-aspeed@lists.ozlabs.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<51c4bdc02b45f67a0e32610a228091e137c135a6.1775679285.git.dawid.glazik@linux.intel.com>","date":"2026-04-08T20:34:34","name":"[v3,2/3] ARM: dts: aspeed-g6: Add nodes for i3c controllers","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"2dfcd680ee17e6426739335b630ac41ef29e3ddb","submitter":{"id":93095,"url":"http://patchwork.ozlabs.org/api/1.0/people/93095/?format=json","name":"Dawid Glazik","email":"dawid.glazik@linux.intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-aspeed/patch/51c4bdc02b45f67a0e32610a228091e137c135a6.1775679285.git.dawid.glazik@linux.intel.com/mbox/","series":[{"id":499224,"url":"http://patchwork.ozlabs.org/api/1.0/series/499224/?format=json","date":"2026-04-08T20:34:34","name":"ARM: dts: aspeed-g6: add AST2600 I3C nodes and bindings","version":3,"mbox":"http://patchwork.ozlabs.org/series/499224/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221250/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-aspeed@lists.ozlabs.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=Pt+AS4ks;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org\n (client-ip=2404:9400:21b9:f100::1; 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a=\"88056914\"","E=Sophos;i=\"6.23,168,1770624000\";\n d=\"scan'208\";a=\"88056914\"","E=Sophos;i=\"6.23,168,1770624000\";\n d=\"scan'208\";a=\"222053368\""],"X-ExtLoop1":"1","From":"Dawid Glazik ","To":"Alexandre Belloni ,\n\tRob Herring ,\n\tKrzysztof Kozlowski ,\n\tConor Dooley ,\n\tJoel Stanley ,\n\tAndrew Jeffery ,\n\tlinux-aspeed@lists.ozlabs.org","Cc":"linux-i3c@lists.infradead.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tFrank Li ,\n\tDawid Glazik ,\n\tMaciej Lawniczak ,\n\tJeremy Kerr ","Subject":"[PATCH v3 2/3] ARM: dts: aspeed-g6: Add nodes for i3c controllers","Date":"Wed, 8 Apr 2026 22:34:34 +0200","Message-ID":"\n <51c4bdc02b45f67a0e32610a228091e137c135a6.1775679285.git.dawid.glazik@linux.intel.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"","References":"","X-Mailing-List":"linux-aspeed@lists.ozlabs.org","List-Id":"","List-Help":"","List-Owner":"","List-Post":"","List-Archive":",\n ","List-Subscribe":",\n ,\n ","List-Unsubscribe":"","Precedence":"list","MIME-Version":"1.0","Organization":"Intel Technology Poland sp. z o.o. - ul. Slowackiego 173,\n 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316","Content-Transfer-Encoding":"8bit","X-Spam-Status":"No, score=-2.3 required=5.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED,\n\tDKIM_VALID,RCVD_IN_DNSWL_MED,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1","X-Spam-Checker-Version":"SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org"},"content":"Add the i3c controller devices to the ast2600 g6 common dts. We add all\n6 busses to the common g6 definition, but leave disabled through the\nstatus property, to be enabled per-platform.\n\nOriginally-by: Jeremy Kerr \nSigned-off-by: Dawid Glazik \n---\nv3:\n - add i3c aliases\n - rebase on top of latest tree and solve conflicts\n - as agreed with Jeremy off-list, he said I can take authorship of this going forward\nv2:\n - use inline bus representation, without the i3c: label\n---\n arch/arm/boot/dts/aspeed/aspeed-g6.dtsi | 97 +++++++++++++++++++++++++\n 1 file changed, 97 insertions(+)","diff":"diff --git a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi\nindex f5641128614f..f986fcbed604 100644\n--- a/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi\n+++ b/arch/arm/boot/dts/aspeed/aspeed-g6.dtsi\n@@ -29,6 +29,12 @@ aliases {\n \t\ti2c13 = &i2c13;\n \t\ti2c14 = &i2c14;\n \t\ti2c15 = &i2c15;\n+\t\ti3c0 = &i3c0;\n+\t\ti3c1 = &i3c1;\n+\t\ti3c2 = &i3c2;\n+\t\ti3c3 = &i3c3;\n+\t\ti3c4 = &i3c4;\n+\t\ti3c5 = &i3c5;\n \t\tserial0 = &uart1;\n \t\tserial1 = &uart2;\n \t\tserial2 = &uart3;\n@@ -1066,6 +1072,97 @@ i2c15: i2c@800 {\n \t\t\t\t};\n \t\t\t};\n \n+\t\t\tbus@1e7a0000 {\n+\t\t\t\tcompatible = \"simple-bus\";\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <1>;\n+\t\t\t\tranges = <0 0x1e7a0000 0x8000>;\n+\n+\t\t\t\ti3c_global: i3c-global@0 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c-global\", \"syscon\";\n+\t\t\t\t\treg = <0x0 0x1000>;\n+\t\t\t\t\tresets = <&syscon ASPEED_RESET_I3C_DMA>;\n+\t\t\t\t};\n+\n+\t\t\t\ti3c0: i3c@2000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x2000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C0CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c1_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 0>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c1: i3c@3000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x3000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C1CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c2_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 1>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c2: i3c@4000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x4000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C2CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c3_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 2>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c3: i3c@5000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x5000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C3CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c4_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 3>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c4: i3c@6000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x6000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C4CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c5_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 4>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\n+\t\t\t\ti3c5: i3c@7000 {\n+\t\t\t\t\tcompatible = \"aspeed,ast2600-i3c\";\n+\t\t\t\t\treg = <0x7000 0x1000>;\n+\t\t\t\t\t#address-cells = <3>;\n+\t\t\t\t\t#size-cells = <0>;\n+\t\t\t\t\tclocks = <&syscon ASPEED_CLK_GATE_I3C5CLK>;\n+\t\t\t\t\tpinctrl-names = \"default\";\n+\t\t\t\t\tpinctrl-0 = <&pinctrl_i3c6_default>;\n+\t\t\t\t\tinterrupts = ;\n+\t\t\t\t\taspeed,global-regs = <&i3c_global 5>;\n+\t\t\t\t\tstatus = \"disabled\";\n+\t\t\t\t};\n+\t\t\t};\n+\n \t\t\tfsim0: fsi@1e79b000 {\n \t\t\t\t#interrupt-cells = <1>;\n \t\t\t\tcompatible = \"aspeed,ast2600-fsi-master\";\n","prefixes":["v3","2/3"]}