{"id":2221229,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2221229/?format=json","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/1.0/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260408212413.217692-4-suneelg@nvidia.com>","date":"2026-04-08T21:24:13","name":"[v2,3/3] arm64: tegra: Add GTE nodes for Tegra264","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"9e400bb4ecb16515dd96e21a690c8d583ff284fd","submitter":{"id":93021,"url":"http://patchwork.ozlabs.org/api/1.0/people/93021/?format=json","name":"Suneel Garapati","email":"suneelg@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260408212413.217692-4-suneelg@nvidia.com/mbox/","series":[{"id":499213,"url":"http://patchwork.ozlabs.org/api/1.0/series/499213/?format=json","date":"2026-04-08T21:24:12","name":"Add Tegra264 HTE provider","version":2,"mbox":"http://patchwork.ozlabs.org/series/499213/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221229/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=GYpL/K2s;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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Apr 2026 21:25:22.0829\n (UTC)","X-MS-Exchange-CrossTenant-Network-Message-Id":"\n 2442fa5e-9739-4a2a-eb9b-08de95b5577f","X-MS-Exchange-CrossTenant-Id":"43083d15-7273-40c1-b7db-39efd9ccc17a","X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp":"\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n\tBN3PEPF0000B373.namprd21.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"MN2PR12MB4254"},"content":"Add AON GPIO and system LIC GTE instances for Tegra264.\n\nSigned-off-by: Suneel Garapati \n---\n arch/arm64/boot/dts/nvidia/tegra264.dtsi | 19 +++++++++++++++++++\n 1 file changed, 19 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi\nindex 06d8357bdf52..c6630733d5e3 100644\n--- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi\n+++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi\n@@ -3207,6 +3207,15 @@ agic_page5: interrupt-controller@99b0000 {\n \t\t\t};\n \t\t};\n \n+\t\thte_lic: hardware-timestamp@8380000 {\n+\t\t\tcompatible = \"nvidia,tegra264-gte-lic\";\n+\t\t\treg = <0x0 0x08380000 0x0 0x10000>;\n+\t\t\tinterrupts = ;\n+\t\t\tnvidia,int-threshold = <1>;\n+\t\t\t#timestamp-cells = <1>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n \t\tgpcdma: dma-controller@8400000 {\n \t\t\tcompatible = \"nvidia,tegra264-gpcdma\", \"nvidia,tegra186-gpcdma\";\n \t\t\treg = <0x0 0x08400000 0x0 0x210000>;\n@@ -3267,6 +3276,16 @@ hsp_top: hsp@8800000 {\n \t\t\t#mbox-cells = <2>;\n \t\t};\n \n+\t\thte_aon: hardware-timestamp@c2b0000 {\n+\t\t\tcompatible = \"nvidia,tegra264-gte-aon\";\n+\t\t\treg = <0x0 0x0c2b0000 0x0 0x10000>;\n+\t\t\tinterrupts = ;\n+\t\t\tnvidia,int-threshold = <1>;\n+\t\t\t#timestamp-cells = <1>;\n+\t\t\tnvidia,gpio-controller = <&gpio_aon>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n \t\trtc: rtc@c2c0000 {\n \t\t\tcompatible = \"nvidia,tegra264-rtc\", \"nvidia,tegra20-rtc\";\n \t\t\treg = <0x0 0x0c2c0000 0x0 0x10000>;\n","prefixes":["v2","3/3"]}