{"id":2221169,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2221169/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<192fd1ca5cefcac271f5efb4cb0b5b15e671f833.1775665981.git.matheus.bernardino@oss.qualcomm.com>","date":"2026-04-08T16:36:56","name":"[v3,05/16] hexagon: print info on \"-d in_asm\" for disabled IEEE FP instructions","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"5d1a65b97b7ce65a23dd36a106807392b7908d3e","submitter":{"id":90606,"url":"http://patchwork.ozlabs.org/api/1.0/people/90606/?format=json","name":"Matheus Tavares Bernardino","email":"matheus.bernardino@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/192fd1ca5cefcac271f5efb4cb0b5b15e671f833.1775665981.git.matheus.bernardino@oss.qualcomm.com/mbox/","series":[{"id":499185,"url":"http://patchwork.ozlabs.org/api/1.0/series/499185/?format=json","date":"2026-04-08T16:36:53","name":"hexagon: add missing HVX float instructions","version":3,"mbox":"http://patchwork.ozlabs.org/series/499185/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221169/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=PoABlAdV;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=iZuZvHG3;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Let's print that info on the \"-d in_asm\" output to help users.\nThis will generate an output like the following:\n\n0x00020e30: 0x1f82e1c0 { V0.sf = vadd(V1.sf,V2.sf) (disabled: no ieee_fp) }\n\nSigned-off-by: Matheus Tavares Bernardino \n---\n target/hexagon/cpu_bits.h | 3 ++-\n target/hexagon/printinsn.h | 2 +-\n disas/hexagon.c | 3 ++-\n target/hexagon/cpu.c | 2 ++\n target/hexagon/decode.c | 4 ++--\n target/hexagon/printinsn.c | 7 ++++++-\n 6 files changed, 15 insertions(+), 6 deletions(-)","diff":"diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h\nindex 83d13de569..1f9e617d72 100644\n--- a/target/hexagon/cpu_bits.h\n+++ b/target/hexagon/cpu_bits.h\n@@ -72,6 +72,7 @@ static inline bool is_packet_end(uint32_t endocing)\n return ((bits == 0x3) || (bits == 0x0));\n }\n \n-int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc, GString *buf);\n+int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc,\n+ GString *buf, const HexagonCPUConfig *cfg);\n \n #endif\ndiff --git a/target/hexagon/printinsn.h b/target/hexagon/printinsn.h\nindex 2ecd1731d0..6a45ec571f 100644\n--- a/target/hexagon/printinsn.h\n+++ b/target/hexagon/printinsn.h\n@@ -21,7 +21,7 @@\n #include \"insn.h\"\n \n void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,\n- target_ulong pc);\n+ target_ulong pc, const HexagonCPUConfig *cfg);\n void snprint_a_pkt_debug(GString *buf, Packet *pkt);\n \n #endif\ndiff --git a/disas/hexagon.c b/disas/hexagon.c\nindex c1a4ffc5f6..e2d3804606 100644\n--- a/disas/hexagon.c\n+++ b/disas/hexagon.c\n@@ -57,8 +57,9 @@ int print_insn_hexagon(bfd_vma memaddr, struct disassemble_info *info)\n return PACKET_WORDS_MAX * sizeof(uint32_t);\n }\n \n+ const HexagonCPUConfig *cfg = info->target_info;\n buf = g_string_sized_new(PACKET_BUFFER_LEN);\n- len = disassemble_hexagon(words, i, memaddr, buf);\n+ len = disassemble_hexagon(words, i, memaddr, buf, cfg);\n (*info->fprintf_func)(info->stream, \"%s\", buf->str);\n g_string_free(buf, true);\n \ndiff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c\nindex 5470d9c7ce..d7f4df5f96 100644\n--- a/target/hexagon/cpu.c\n+++ b/target/hexagon/cpu.c\n@@ -307,6 +307,8 @@ static void hexagon_cpu_disas_set_info(const CPUState *cs,\n {\n info->print_insn = print_insn_hexagon;\n info->endian = BFD_ENDIAN_LITTLE;\n+ HexagonCPU *cpu = HEXAGON_CPU(cs);\n+ info->target_info = &cpu->cfg;\n }\n \n static void hexagon_cpu_realize(DeviceState *dev, Error **errp)\ndiff --git a/target/hexagon/decode.c b/target/hexagon/decode.c\nindex dbc9c630e8..d7ce8c8e1b 100644\n--- a/target/hexagon/decode.c\n+++ b/target/hexagon/decode.c\n@@ -801,7 +801,7 @@ int decode_packet(DisasContext *ctx, int max_words, const uint32_t *words,\n \n /* Used for \"-d in_asm\" logging */\n int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc,\n- GString *buf)\n+ GString *buf, const HexagonCPUConfig *cfg)\n {\n DisasContext ctx;\n Packet pkt;\n@@ -810,7 +810,7 @@ int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc,\n ctx.pkt = &pkt;\n \n if (decode_packet(&ctx, nwords, words, &pkt, true) > 0) {\n- snprint_a_pkt_disas(buf, &pkt, words, pc);\n+ snprint_a_pkt_disas(buf, &pkt, words, pc, cfg);\n return pkt.encod_pkt_size_in_bytes;\n } else {\n g_string_assign(buf, \"\");\ndiff --git a/target/hexagon/printinsn.c b/target/hexagon/printinsn.c\nindex 4865cdd133..85527f56e2 100644\n--- a/target/hexagon/printinsn.c\n+++ b/target/hexagon/printinsn.c\n@@ -51,7 +51,7 @@ static void snprintinsn(GString *buf, Insn *insn)\n }\n \n void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,\n- target_ulong pc)\n+ target_ulong pc, const HexagonCPUConfig *cfg)\n {\n bool has_endloop0 = false;\n bool has_endloop1 = false;\n@@ -85,6 +85,11 @@ void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,\n g_string_append(buf, \"\\t\");\n snprintinsn(buf, &(pkt->insn[i]));\n \n+ if (!cfg->ieee_fp_extension &&\n+ GET_ATTRIB(pkt->insn[i].opcode, A_HVX_IEEE_FP)) {\n+ g_string_append(buf, \" (disabled: no ieee_fp)\");\n+ }\n+\n if (i < pkt->num_insns - 1) {\n /*\n * Subinstructions are two instructions encoded\n","prefixes":["v3","05/16"]}