{"id":2221148,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2221148/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260408041953.1899532-3-brian.cain@oss.qualcomm.com>","date":"2026-04-08T04:19:27","name":"[v4,02/28] target/hexagon: Implement iassign{r,w} helpers","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"3e4e8700055caf35675adafbe99dc08a5995e800","submitter":{"id":89839,"url":"http://patchwork.ozlabs.org/api/1.0/people/89839/?format=json","name":"Brian Cain","email":"brian.cain@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260408041953.1899532-3-brian.cain@oss.qualcomm.com/mbox/","series":[{"id":499179,"url":"http://patchwork.ozlabs.org/api/1.0/series/499179/?format=json","date":"2026-04-08T04:19:31","name":"Hexagon system emulation - Part 2/3","version":4,"mbox":"http://patchwork.ozlabs.org/series/499179/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221148/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=H0fkjJAB;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=QAysKq6C;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDA4MDAzNiBTYWx0ZWRfX/GabarmlZ4HV\n zpst8jWpHfJ2PPTkoC9+QBQNmLGmNTOHPwWWKTt4yKeFE6dXJoo4zYr/zl+eikrNUXLyIWoNbjB\n Ff6tcwi/KGSSPHzb0RTJa1ECyZiz08bOh/remE39tph6Pu8s00GUTIrpz3u3p9uBQXCwlwuUgND\n DccGaCDwxhZWGgmn5fL/pBxyO0OB1CYUNxHMBQxcXTvEUqwshkN6ukqQI5gNVLRqJ3SZ5i4al0P\n pNF0hwCGuaL5mkdXkDGZlP+LRK660EQuSmIQFX94Ky7Nnw5PrazG/AiBXxP/6hJk2gYCdgG1zi1\n B6VLzGgcsYNdbz+flF51PXkx5SXqzkLokcqsFjq77txB0brNADk2azogblwH/eZgXq8aA8/HnZ1\n ql3+vf1JxP1B8bt/QxuOg7smKzAT0kaMpxA/ZLqZlhFQ4zgPQYjWXnXin/0kBYLgUAlKB8aIZeO\n D8uOgRuyyguZUjppm7A==","X-Proofpoint-GUID":"xYaccXacgJ7mMuQ4GUWcjN0j3o4j49-4","X-Proofpoint-ORIG-GUID":"xYaccXacgJ7mMuQ4GUWcjN0j3o4j49-4","X-Authority-Analysis":"v=2.4 cv=K4AS2SWI c=1 sm=1 tr=0 ts=69d5d77c cx=c_pps\n a=kVLUcbK0zfr7ocalXnG1qA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=gowsoOTTUOVcmtlkKump:22\n a=COk6AnOGAAAA:8 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=VnV9S1Uu6eltRR5mmX4A:9\n a=QEXdDO2ut3YA:10 a=vr4QvYf-bLy2KjpDp97w:22 a=TjNXssC_j7lpFel5tvFf:22","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-08_02,2026-04-07_05,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 impostorscore=0 lowpriorityscore=0 clxscore=1015\n phishscore=0 malwarescore=0 spamscore=0 bulkscore=0 adultscore=0\n suspectscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000\n definitions=main-2604080036","Received-SPF":"pass client-ip=205.220.180.131;\n envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Brian Cain \n\niassign{r,w} are the \"Interrupt to thread assignment {read,write}\"\ninstructions.\n\nReviewed-by: Taylor Simpson \nSigned-off-by: Brian Cain \n---\n target/hexagon/op_helper.c | 56 ++++++++++++++++++++++++++++++++++++--\n 1 file changed, 54 insertions(+), 2 deletions(-)","diff":"diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c\nindex 04d9f1286c9..7e6e04e512a 100644\n--- a/target/hexagon/op_helper.c\n+++ b/target/hexagon/op_helper.c\n@@ -1416,12 +1416,64 @@ void HELPER(cswi)(CPUHexagonState *env, uint32_t mask)\n \n void HELPER(iassignw)(CPUHexagonState *env, uint32_t src)\n {\n- g_assert_not_reached();\n+ uint32_t modectl;\n+ uint32_t thread_enabled_mask;\n+ CPUState *cpu;\n+ HexagonCPU *hex_cpu;\n+\n+ BQL_LOCK_GUARD();\n+ hex_cpu = env_archcpu(env);\n+ modectl = hex_cpu->globalregs ?\n+ hexagon_globalreg_read(hex_cpu->globalregs, HEX_SREG_MODECTL,\n+ env->threadId) : 0;\n+ thread_enabled_mask = GET_FIELD(MODECTL_E, modectl);\n+\n+ CPU_FOREACH(cpu) {\n+ CPUHexagonState *thread_env = &(HEXAGON_CPU(cpu)->env);\n+ uint32_t thread_id_mask = 0x1 << thread_env->threadId;\n+ if (thread_enabled_mask & thread_id_mask) {\n+ uint32_t imask = thread_env->t_sreg[HEX_SREG_IMASK];\n+ uint32_t intbitpos = (src >> 16) & 0xF;\n+ uint32_t val = (src >> thread_env->threadId) & 0x1;\n+ imask = deposit32(imask, intbitpos, 1, val);\n+ thread_env->t_sreg[HEX_SREG_IMASK] = imask;\n+\n+ qemu_log_mask(CPU_LOG_INT, \"%s: thread \" TARGET_FMT_ld\n+ \", new imask 0x%\" PRIx32 \"\\n\", __func__,\n+ thread_env->threadId, imask);\n+ }\n+ }\n+ hex_interrupt_update(env);\n }\n \n uint32_t HELPER(iassignr)(CPUHexagonState *env, uint32_t src)\n {\n- g_assert_not_reached();\n+ uint32_t modectl;\n+ uint32_t thread_enabled_mask;\n+ uint32_t intbitpos;\n+ uint32_t dest_reg;\n+ CPUState *cpu;\n+ HexagonCPU *hex_cpu;\n+\n+ BQL_LOCK_GUARD();\n+ hex_cpu = env_archcpu(env);\n+ modectl = hex_cpu->globalregs ?\n+ hexagon_globalreg_read(hex_cpu->globalregs, HEX_SREG_MODECTL,\n+ env->threadId) : 0;\n+ thread_enabled_mask = GET_FIELD(MODECTL_E, modectl);\n+ /* src fields are in same position as modectl, but mean different things */\n+ intbitpos = GET_FIELD(MODECTL_W, src);\n+ dest_reg = 0;\n+ CPU_FOREACH(cpu) {\n+ CPUHexagonState *thread_env = &(HEXAGON_CPU(cpu)->env);\n+ uint32_t thread_id_mask = 0x1 << thread_env->threadId;\n+ if (thread_enabled_mask & thread_id_mask) {\n+ uint32_t imask = thread_env->t_sreg[HEX_SREG_IMASK];\n+ dest_reg |= ((imask >> intbitpos) & 0x1) << thread_env->threadId;\n+ }\n+ }\n+\n+ return dest_reg;\n }\n \n void HELPER(start)(CPUHexagonState *env, uint32_t imask)\n","prefixes":["v4","02/28"]}