{"id":2221062,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2221062/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260408041953.1899532-21-brian.cain@oss.qualcomm.com>","date":"2026-04-08T04:19:45","name":"[v4,20/28] target/hexagon: Add pkt_ends_tb to translation","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"660a29adf6c4af5910c21dc9614e847f1438f09d","submitter":{"id":89839,"url":"http://patchwork.ozlabs.org/api/1.0/people/89839/?format=json","name":"Brian Cain","email":"brian.cain@oss.qualcomm.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260408041953.1899532-21-brian.cain@oss.qualcomm.com/mbox/","series":[{"id":499179,"url":"http://patchwork.ozlabs.org/api/1.0/series/499179/?format=json","date":"2026-04-08T04:19:31","name":"Hexagon system emulation - Part 2/3","version":4,"mbox":"http://patchwork.ozlabs.org/series/499179/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2221062/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=Z3vkoSvB;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=E+JYgrsi;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"","Content-Transfer-Encoding":"base64","X-Authority-Analysis":"v=2.4 cv=etfvCIpX c=1 sm=1 tr=0 ts=69d5d78e cx=c_pps\n a=Uww141gWH0fZj/3QKPojxA==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22\n a=COk6AnOGAAAA:8 a=pGLkceISAAAA:8 a=EUspDBNiAAAA:8 a=PUAfe4L2FItr89aHCx8A:9\n a=QEXdDO2ut3YA:10 a=PxkB5W3o20Ba91AHUih5:22 a=TjNXssC_j7lpFel5tvFf:22","X-Proofpoint-ORIG-GUID":"9CnVWTjHxX9pc4q4UV-kux8U2TPAn3dy","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDA4MDAzNSBTYWx0ZWRfXzVtnMOBPkQ73\n MCMdLnlqYcOBKJj75WzE0dp3UUbqkehX6pZTqvpQ2C4g4B/M1LZgMZUysSlPdP/Pd83LfuFMhQ6\n H1r6rLin1eiUiaGQV5xjPzLhYGg7ae6CyVMGwEfgnBOXabV510XGhojBUgZ3Otyy8WmcNKOjtIZ\n 2XU+xiCsDohb+D+hmsV4M9dWat6O/dJtJwqnhm7rkuHoscW72in6V2DSiWaZX8DNhNiEzhNgMjQ\n rfTn1yG7W1a4Ca1fhTQw+cFEcAoxkeq4S17XplSfAikIrgwb3MKZdpxkh8CGDmIqe4drxaIzeUM\n AQFUmYY+IL3DhzuKMyytRXC/H890XkcVt9XtslivH0YK92n1/RXM3pPrWlqusNF3q4tKXUZj3VB\n vgqqFFBlvu/ZHrE6XqxV1TMj/IAtoFYD4cm2xICR3ZAzS+uLPZc+B2RC932qQnnsWSEyz22aNVW\n 4GP9MDnzUfzPbGO8nfQ==","X-Proofpoint-GUID":"9CnVWTjHxX9pc4q4UV-kux8U2TPAn3dy","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-08_02,2026-04-07_05,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 lowpriorityscore=0 phishscore=0 bulkscore=0\n impostorscore=0 suspectscore=0 spamscore=0 clxscore=1015 malwarescore=0\n adultscore=0 classifier=typeunknown authscore=0 authtc= authcc=\n route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2604010000\n definitions=main-2604080035","Received-SPF":"pass client-ip=205.220.180.131;\n envelope-from=brian.cain@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com","X-Spam_score_int":"-27","X-Spam_score":"-2.8","X-Spam_bar":"--","X-Spam_report":"(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Brian Cain \n\nReviewed-by: Taylor Simpson \nSigned-off-by: Brian Cain \n---\n target/hexagon/translate.h | 1 -\n target/hexagon/translate.c | 101 ++++++++++++++++++++++++++++++++++++-\n 2 files changed, 99 insertions(+), 3 deletions(-)","diff":"diff --git a/target/hexagon/translate.h b/target/hexagon/translate.h\nindex 4e090565aac..82b327312ec 100644\n--- a/target/hexagon/translate.h\n+++ b/target/hexagon/translate.h\n@@ -85,7 +85,6 @@ typedef struct DisasContext {\n TCGv branch_taken;\n TCGv dczero_addr;\n bool pcycle_enabled;\n- bool pkt_ends_tb;\n uint32_t num_cycles;\n } DisasContext;\n \ndiff --git a/target/hexagon/translate.c b/target/hexagon/translate.c\nindex 07829063868..6bba135f692 100644\n--- a/target/hexagon/translate.c\n+++ b/target/hexagon/translate.c\n@@ -272,6 +272,16 @@ static bool check_for_attrib(Packet *pkt, int attrib)\n return false;\n }\n \n+static bool check_for_opcode(Packet *pkt, uint16_t opcode)\n+{\n+ for (int i = 0; i < pkt->num_insns; i++) {\n+ if (pkt->insn[i].opcode == opcode) {\n+ return true;\n+ }\n+ }\n+ return false;\n+}\n+\n static bool need_slot_cancelled(Packet *pkt)\n {\n /* We only need slot_cancelled for conditional store instructions */\n@@ -285,6 +295,90 @@ static bool need_slot_cancelled(Packet *pkt)\n return false;\n }\n \n+#ifndef CONFIG_USER_ONLY\n+static bool sreg_write_ends_tb(int reg_num)\n+{\n+ return reg_num == HEX_SREG_SSR ||\n+ reg_num == HEX_SREG_STID ||\n+ reg_num == HEX_SREG_IMASK ||\n+ reg_num == HEX_SREG_IPENDAD ||\n+ reg_num == HEX_SREG_BESTWAIT ||\n+ reg_num == HEX_SREG_SCHEDCFG;\n+}\n+\n+static bool has_sreg_write_ends_tb(Packet const *pkt)\n+{\n+ for (int i = 0; i < pkt->num_insns; i++) {\n+ Insn const *insn = &pkt->insn[i];\n+ uint16_t opcode = insn->opcode;\n+ if (opcode == Y2_tfrsrcr) {\n+ /* Write to a single sreg */\n+ int reg_num = insn->regno[0];\n+ if (sreg_write_ends_tb(reg_num)) {\n+ return true;\n+ }\n+ } else if (opcode == Y4_tfrspcp) {\n+ /* Write to a sreg pair */\n+ int reg_num = insn->regno[0];\n+ if (sreg_write_ends_tb(reg_num)) {\n+ return true;\n+ }\n+ if (sreg_write_ends_tb(reg_num + 1)) {\n+ return true;\n+ }\n+ }\n+ }\n+ return false;\n+}\n+#endif\n+\n+static bool pkt_ends_tb(Packet *pkt)\n+{\n+ if (pkt->pkt_has_cof) {\n+ return true;\n+ }\n+#ifndef CONFIG_USER_ONLY\n+ /* System mode instructions that end TLB */\n+ if (check_for_opcode(pkt, Y2_swi) ||\n+ check_for_opcode(pkt, Y2_cswi) ||\n+ check_for_opcode(pkt, Y2_ciad) ||\n+ check_for_opcode(pkt, Y4_siad) ||\n+ check_for_opcode(pkt, Y2_wait) ||\n+ check_for_opcode(pkt, Y2_resume) ||\n+ check_for_opcode(pkt, Y2_iassignw) ||\n+ check_for_opcode(pkt, Y2_setimask) ||\n+ check_for_opcode(pkt, Y4_nmi) ||\n+ check_for_opcode(pkt, Y2_setprio) ||\n+ check_for_opcode(pkt, Y2_start) ||\n+ check_for_opcode(pkt, Y2_stop) ||\n+ check_for_opcode(pkt, Y2_k0lock) ||\n+ check_for_opcode(pkt, Y2_k0unlock) ||\n+ check_for_opcode(pkt, Y2_tlblock) ||\n+ check_for_opcode(pkt, Y2_tlbunlock) ||\n+ check_for_opcode(pkt, Y2_break) ||\n+ check_for_opcode(pkt, Y2_isync) ||\n+ check_for_opcode(pkt, Y2_syncht) ||\n+ check_for_opcode(pkt, Y2_tlbp) ||\n+ check_for_opcode(pkt, Y2_tlbw) ||\n+ check_for_opcode(pkt, Y5_ctlbw) ||\n+ check_for_opcode(pkt, Y5_tlbasidi)) {\n+ return true;\n+ }\n+\n+ /*\n+ * Check for sreg writes that would end the TB\n+ */\n+ if (check_for_attrib(pkt, A_IMPLICIT_WRITES_SSR)) {\n+ return true;\n+ }\n+ if (has_sreg_write_ends_tb(pkt)) {\n+ return true;\n+ }\n+#endif\n+ return false;\n+}\n+\n+\n static bool need_next_PC(DisasContext *ctx)\n {\n Packet *pkt = ctx->pkt;\n@@ -447,7 +541,10 @@ static void analyze_packet(DisasContext *ctx)\n static void gen_start_packet(DisasContext *ctx)\n {\n Packet *pkt = ctx->pkt;\n- target_ulong next_PC = ctx->base.pc_next + pkt->encod_pkt_size_in_bytes;\n+ uint32_t next_PC = (check_for_opcode(pkt, Y2_k0lock) ||\n+ check_for_opcode(pkt, Y2_tlblock)) ?\n+ ctx->base.pc_next :\n+ ctx->base.pc_next + pkt->encod_pkt_size_in_bytes;\n int i;\n \n /* Clear out the disassembly context */\n@@ -959,7 +1056,7 @@ static void gen_commit_packet(DisasContext *ctx)\n pkt->vhist_insn->generate(ctx);\n }\n \n- if (pkt->pkt_has_cof) {\n+ if (pkt_ends_tb(ctx->pkt) || ctx->base.is_jmp == DISAS_NORETURN) {\n gen_end_tb(ctx);\n }\n }\n","prefixes":["v4","20/28"]}