{"id":2220107,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2220107/?format=json","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.0/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260406-timer-v1-1-f7c5a290c459@oss.qualcomm.com>","date":"2026-04-06T10:55:36","name":"[1/2] armv8: timer: Add option to use virtual counter at EL1","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"8fd1d83186b2700833c21ca36e991b8975d886a8","submitter":{"id":90810,"url":"http://patchwork.ozlabs.org/api/1.0/people/90810/?format=json","name":"Balaji Selvanathan","email":"balaji.selvanathan@oss.qualcomm.com"},"delegate":{"id":151538,"url":"http://patchwork.ozlabs.org/api/1.0/users/151538/?format=json","username":"kcxt","first_name":"Casey","last_name":"Connolly","email":"casey.connolly@linaro.org"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260406-timer-v1-1-f7c5a290c459@oss.qualcomm.com/mbox/","series":[{"id":498842,"url":"http://patchwork.ozlabs.org/api/1.0/series/498842/?format=json","date":"2026-04-06T10:55:35","name":"ARMv8 timer fixes for platforms without EL2 configuration","version":1,"mbox":"http://patchwork.ozlabs.org/series/498842/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2220107/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=KpU9WXcJ;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=P5MT14w5;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=oss.qualcomm.com","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"KpU9WXcJ\";\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"P5MT14w5\";\n\tdkim-atps=neutral","phobos.denx.de; dmarc=none (p=none dis=none)\n header.from=oss.qualcomm.com","phobos.denx.de; spf=pass\n smtp.mailfrom=balaji.selvanathan@oss.qualcomm.com"],"Received":["from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fq5pm1Tdvz1yFt\n\tfor ; Mon, 06 Apr 2026 20:56:00 +1000 (AEST)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id CCDC984020;\n\tMon, 6 Apr 2026 12:55:54 +0200 (CEST)","by phobos.denx.de (Postfix, from userid 109)\n id 1B80E80433; Mon, 6 Apr 2026 12:55:53 +0200 (CEST)","from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com\n [205.220.180.131])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 1D05983E7A\n for ; Mon, 6 Apr 2026 12:55:49 +0200 (CEST)","from pps.filterd (m0279873.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 6369D7Mc2554003\n for ; Mon, 6 Apr 2026 10:55:48 GMT","from mail-pf1-f198.google.com (mail-pf1-f198.google.com\n [209.85.210.198])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4dar0mn1x0-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for ; Mon, 06 Apr 2026 10:55:48 +0000 (GMT)","by mail-pf1-f198.google.com with SMTP id\n d2e1a72fcca58-82c613194caso2384511b3a.1\n for ; Mon, 06 Apr 2026 03:55:48 -0700 (PDT)","from hu-bselvana-blr.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260406-timer-v1-1-f7c5a290c459@oss.qualcomm.com>","References":"<20260406-timer-v1-0-f7c5a290c459@oss.qualcomm.com>","In-Reply-To":"<20260406-timer-v1-0-f7c5a290c459@oss.qualcomm.com>","To":"u-boot@lists.denx.de, Sumit Garg ,\n u-boot-qcom@groups.io","Cc":"Tom Rini ,\n Kaustabh Chakraborty ,\n Casey Connolly ,\n Neil Armstrong ,\n Sughosh Ganu ,\n Ilias Apalodimas ,\n George Chan ,\n Balaji Selvanathan ","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1775472938; l=3029;\n i=balaji.selvanathan@oss.qualcomm.com; s=20260213; h=from:subject:message-id;\n bh=mo7N4tK3Fu1vI4NE1Max2qxM1n9s5RUlS7mqWbgFkbA=;\n b=ALFUs+I96+GgN3XowKrup67XBEFyRNRR5nY9tiN4gHhAEPzflbNfzuRdBFWXmGCbtu5fHqQ44\n LZr56hbtpsGDbtne+DUH/Z2J1C1M+dfiXOUi//9eMaUBL2l5nJ2nQRt","X-Developer-Key":"i=balaji.selvanathan@oss.qualcomm.com; a=ed25519;\n pk=CDpYiUU3SH7KGEtsBvY2tBGPiWfMxqWJF0p2LftOfnc=","X-Proofpoint-ORIG-GUID":"kk1LgAdw7q-zImIdoObGvDHcdHemqOR-","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDA2MDEwNiBTYWx0ZWRfXyEpBL0LeXlYp\n 3jtveldPON6ByFFWo1FOVckrVcX7ghGschxpiJbCP1YRBcqWwDh1SMKGRG4Px22W63604WBi2fQ\n 29kFmVGz41MSqrFeggnn56BDIpnJ3sYtuoZFme63xVpRYCB2my7JrF8V4+3Id7Kbof/U0rZoGWv\n CCqXeZpxhTx07az3Mv48r6C88SSdVi0bE/V5qoY6Zd1S+3ej1l1WDKKM2pzAAUrsvEbgWlOHB5S\n SIWhkovUWd3H1vDAa5V80eRMSi71hTxz8wZCIUFvWOKCx8TwW9BfnUr6OUX9O6DG24PQNN3THe9\n lHTnTcTBCJ0V8UINl43rTHLCIQnVW+ZICams+J4OeapCLLEkV4FFKZVNygOsN4wK8IiaZfdjckS\n GltIRw5ovk8YpwsCkSpknlBaqXmxB261m+y0mpcQfweku5WfsuEEtfNxXlZQgw195YYYmRm9QvN\n Q2l4f0v2TUaKaJbLRIw==","X-Authority-Analysis":"v=2.4 cv=PpaergM3 c=1 sm=1 tr=0 ts=69d39134 cx=c_pps\n a=m5Vt/hrsBiPMCU0y4gIsQw==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=IkcTkHD0fZMA:10 a=A5OVakUREuEA:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22\n a=EUspDBNiAAAA:8 a=L-uvaZSnVQ2Xq_8tjAIA:9 a=QEXdDO2ut3YA:10\n a=IoOABgeZipijB_acs4fv:22","X-Proofpoint-GUID":"kk1LgAdw7q-zImIdoObGvDHcdHemqOR-","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-06_02,2026-04-03_01,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n clxscore=1015 spamscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0\n suspectscore=0 priorityscore=1501 malwarescore=0 impostorscore=0 adultscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2604060106","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"Add CONFIG_ARMV8_TIMER_USE_VIRTUAL_COUNTER to allow platforms to use\nthe virtual counter (CNTVCT_EL0) instead of the physical counter\n(CNTPCT_EL0) when running at EL1.\n\nThis addresses platforms where the hypervisor or EL2 firmware does\nnot configure CNTHCTL_EL2.EL1PCTEN, causing EL1 access to CNTPCT_EL0\nto trap. The virtual counter is typically accessible without trapping\nand provides equivalent functionality when CNTVOFF_EL2 is zero, as is\ntypical in bootloader environments.\n\nThe new Kconfig option is disabled by default to maintain existing\nbehavior on platforms where physical counter access works correctly.\n\nSigned-off-by: Balaji Selvanathan \n---\n arch/arm/cpu/armv8/Kconfig | 19 +++++++++++++++++++\n arch/arm/cpu/armv8/generic_timer.c | 13 +++++++++++++\n 2 files changed, 32 insertions(+)","diff":"diff --git a/arch/arm/cpu/armv8/Kconfig b/arch/arm/cpu/armv8/Kconfig\nindex dfc4ce851c3..00c7303e09d 100644\n--- a/arch/arm/cpu/armv8/Kconfig\n+++ b/arch/arm/cpu/armv8/Kconfig\n@@ -12,6 +12,25 @@ config ARMV8_CNTFRQ_BROKEN\n \t does not set the CNTFRQ_EL0 frequency, and its not possible to\n \t set it from U-Boot either.\n \n+config ARMV8_TIMER_USE_VIRTUAL_COUNTER\n+\tbool \"Use virtual counter (CNTVCT_EL0) at EL1\"\n+\tdepends on SYS_ARCH_TIMER\n+\thelp\n+\t Say Y here if the platform's hypervisor/EL2 firmware does not\n+\t configure CNTHCTL_EL2.EL1PCTEN to allow EL1 access to the physical\n+\t counter (CNTPCT_EL0), causing traps when attempting to read it.\n+\n+\t This option makes the generic timer use the virtual counter\n+\t (CNTVCT_EL0) when running at EL1, which is typically accessible\n+\t without trapping.\n+\n+\t This is a workaround for platforms where the EL2 firmware cannot\n+\t properly configure CNTHCTL_EL2. In most cases, the\n+\t virtual counter provides equivalent functionality since CNTVOFF_EL2\n+\t is typically zero in bootloader environments.\n+\n+\t If unsure, say N.\n+\n config ARMV8_SPL_EXCEPTION_VECTORS\n \tbool \"Install crash dump exception vectors\"\n \tdepends on SPL\ndiff --git a/arch/arm/cpu/armv8/generic_timer.c b/arch/arm/cpu/armv8/generic_timer.c\nindex 744ab3b91e5..6dc98874504 100644\n--- a/arch/arm/cpu/armv8/generic_timer.c\n+++ b/arch/arm/cpu/armv8/generic_timer.c\n@@ -86,7 +86,20 @@ unsigned long notrace timer_read_counter(void)\n \tunsigned long cntpct;\n \n \tisb();\n+\n+#ifdef CONFIG_ARMV8_TIMER_USE_VIRTUAL_COUNTER\n+\t/*\n+\t * Use virtual counter (CNTVCT_EL0) at EL1 if configured.\n+\t * This is a workaround for platforms where the hypervisor/EL2 firmware\n+\t * does not configure CNTHCTL_EL2.EL1PCTEN, causing EL1 access to\n+\t * CNTPCT_EL0 to trap. The virtual counter is typically accessible\n+\t * without trapping and provides equivalent functionality when\n+\t * CNTVOFF_EL2 is zero (as is typical in bootloader environments).\n+\t */\n+\tasm volatile(\"mrs %0, cntvct_el0\" : \"=r\" (cntpct));\n+#else\n \tasm volatile(\"mrs %0, cntpct_el0\" : \"=r\" (cntpct));\n+#endif\n \n \treturn cntpct;\n }\n","prefixes":["1/2"]}