{"id":2219548,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2219548/?format=json","project":{"id":42,"url":"http://patchwork.ozlabs.org/api/1.0/projects/42/?format=json","name":"Linux GPIO development","link_name":"linux-gpio","list_id":"linux-gpio.vger.kernel.org","list_email":"linux-gpio@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260403-ad4692-multichannel-sar-adc-driver-v6-1-fa2a01a57c4e@analog.com>","date":"2026-04-03T11:03:02","name":"[v6,1/4] dt-bindings: iio: adc: add AD4691 family","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"1559957ca02f70d44f7b35b47c7276a64ac22363","submitter":{"id":92791,"url":"http://patchwork.ozlabs.org/api/1.0/people/92791/?format=json","name":"Radu Sabau via B4 Relay","email":"devnull+radu.sabau.analog.com@kernel.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-gpio/patch/20260403-ad4692-multichannel-sar-adc-driver-v6-1-fa2a01a57c4e@analog.com/mbox/","series":[{"id":498617,"url":"http://patchwork.ozlabs.org/api/1.0/series/498617/?format=json","date":"2026-04-03T11:03:02","name":"iio: adc: ad4691: add driver for AD4691 multichannel SAR ADC family","version":6,"mbox":"http://patchwork.ozlabs.org/series/498617/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219548/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-gpio@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=JAKaSFyl;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; 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charset=\"utf-8\"","Content-Transfer-Encoding":"8bit","Message-Id":"\n <20260403-ad4692-multichannel-sar-adc-driver-v6-1-fa2a01a57c4e@analog.com>","References":"\n <20260403-ad4692-multichannel-sar-adc-driver-v6-0-fa2a01a57c4e@analog.com>","In-Reply-To":"\n <20260403-ad4692-multichannel-sar-adc-driver-v6-0-fa2a01a57c4e@analog.com>","To":"Lars-Peter Clausen ,\n Michael Hennerich ,\n Jonathan Cameron , David Lechner ,\n\t=?utf-8?q?Nuno_S=C3=A1?= ,\n Andy Shevchenko , Rob Herring ,\n Krzysztof Kozlowski ,\n Conor Dooley ,\n =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= ,\n Liam Girdwood , Mark Brown ,\n Linus Walleij , Bartosz Golaszewski ,\n Philipp Zabel , Jonathan Corbet ,\n Shuah Khan ","Cc":"linux-iio@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-pwm@vger.kernel.org,\n linux-gpio@vger.kernel.org, linux-doc@vger.kernel.org,\n Radu Sabau ","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1775214183; l=6575;\n i=radu.sabau@analog.com; s=20260220; h=from:subject:message-id;\n bh=8WQtXGwAJMX9LKjokE7g+NNdM3YBj5DyijsdwhSVWu8=;\n b=qXP21IGz6MCvXBgBnvl8KTAVHMRpqPPClFtHZU5gpe7WSfHfhS19PHYMvf8v6qeGn5f95Lhp1\n BiSvvlHDn+WBwmXrkmRJVNNYzsH3JE1qjX3J7H7AJbakkmK693nIgF9","X-Developer-Key":"i=radu.sabau@analog.com; a=ed25519;\n pk=lDPQHgn9jTdt0vo58Na9lLxLaE2mb330if71Cn+EvFU=","X-Endpoint-Received":"by B4 Relay for radu.sabau@analog.com/20260220 with\n auth_id=642","X-Original-From":"Radu Sabau ","Reply-To":"radu.sabau@analog.com"},"content":"From: Radu Sabau \n\nAdd DT bindings for the Analog Devices AD4691 family of multichannel\nSAR ADCs (AD4691, AD4692, AD4693, AD4694).\n\nThe binding describes the hardware connections:\n\n- Power domains: avdd-supply (required), vio-supply, ref-supply or\n refin-supply (external reference; the REFIN path enables the\n internal reference buffer), and an optional ldo-in-supply, that if\n absent, means the on-chip internal LDO will be used.\n\n- Optional PWM on the CNV pin selects CNV Burst Mode; when absent,\n Manual Mode is assumed with CNV tied to SPI CS.\n\n- An optional reset GPIO (reset-gpios) for hardware reset.\n\n- Up to four GP pins (gp0..gp3) usable as interrupt sources,\n identified in firmware via interrupt-names \"gp0\"..\"gp3\".\n\n- gpio-controller with #gpio-cells = <2> for GP pin GPIO usage.\n\n- #trigger-source-cells = <1>: one cell selecting the GP pin number\n (0-3) used as the SPI offload trigger source.\n\nTwo binding examples are provided: CNV Burst Mode with SPI offload\n(DMA data acquisition driven by DATA_READY on a GP pin), and Manual\nMode for CPU-driven triggered-buffer or single-shot capture.\n\nSigned-off-by: Radu Sabau \n---\n .../devicetree/bindings/iio/adc/adi,ad4691.yaml | 162 +++++++++++++++++++++\n MAINTAINERS | 7 +\n 2 files changed, 169 insertions(+)","diff":"diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml\nnew file mode 100644\nindex 000000000000..81d2ca4e0e22\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/iio/adc/adi,ad4691.yaml\n@@ -0,0 +1,162 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/iio/adc/adi,ad4691.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Analog Devices AD4691 Family Multichannel SAR ADCs\n+\n+maintainers:\n+ - Radu Sabau \n+\n+description: |\n+ The AD4691 family are high-speed, low-power, multichannel successive\n+ approximation register (SAR) analog-to-digital converters (ADCs) with\n+ an SPI-compatible serial interface. The ADC supports CNV Burst Mode,\n+ where an external PWM drives the CNV pin, and Manual Mode, where CNV\n+ is directly tied to the SPI chip-select.\n+\n+ Datasheets:\n+ * https://www.analog.com/en/products/ad4691.html\n+ * https://www.analog.com/en/products/ad4692.html\n+ * https://www.analog.com/en/products/ad4693.html\n+ * https://www.analog.com/en/products/ad4694.html\n+\n+$ref: /schemas/spi/spi-peripheral-props.yaml#\n+\n+properties:\n+ compatible:\n+ enum:\n+ - adi,ad4691\n+ - adi,ad4692\n+ - adi,ad4693\n+ - adi,ad4694\n+\n+ reg:\n+ maxItems: 1\n+\n+ spi-max-frequency:\n+ maximum: 40000000\n+\n+ spi-cpol: true\n+ spi-cpha: true\n+\n+ avdd-supply:\n+ description: Analog power supply (4.5V to 5.5V).\n+\n+ ldo-in-supply:\n+ description: LDO input supply. When absent, the internal LDO is used.\n+\n+ vio-supply:\n+ description: I/O voltage supply (1.71V to 1.89V or VDD).\n+\n+ ref-supply:\n+ description: External reference voltage supply (2.4V to 5.25V).\n+\n+ refin-supply:\n+ description: Internal reference buffer input supply.\n+\n+ reset-gpios:\n+ description:\n+ GPIO line controlling the hardware reset pin (active-low).\n+ maxItems: 1\n+\n+ pwms:\n+ description:\n+ PWM connected to the CNV pin. When present, selects CNV Burst Mode where\n+ the PWM drives the conversion rate. When absent, Manual Mode is used\n+ (CNV tied to SPI CS).\n+ maxItems: 1\n+\n+ interrupts:\n+ description:\n+ Interrupt lines connected to the ADC GP pins. Each GP pin can be\n+ physically wired to an interrupt-capable input on the SoC.\n+ maxItems: 4\n+\n+ interrupt-names:\n+ description: Names of the interrupt lines, matching the GP pin names.\n+ minItems: 1\n+ maxItems: 4\n+ items:\n+ enum:\n+ - gp0\n+ - gp1\n+ - gp2\n+ - gp3\n+\n+ gpio-controller: true\n+\n+ '#gpio-cells':\n+ const: 2\n+\n+ '#trigger-source-cells':\n+ description:\n+ This node can act as a trigger source. The single cell in a consumer\n+ reference specifies the GP pin number (0-3) used as the trigger output.\n+ const: 1\n+\n+required:\n+ - compatible\n+ - reg\n+ - avdd-supply\n+ - vio-supply\n+\n+allOf:\n+ # ref-supply and refin-supply are mutually exclusive, one is required\n+ - oneOf:\n+ - required:\n+ - ref-supply\n+ - required:\n+ - refin-supply\n+\n+unevaluatedProperties: false\n+\n+examples:\n+ - |\n+ #include \n+ /* AD4692 in CNV Burst Mode with SPI offload */\n+ spi {\n+ #address-cells = <1>;\n+ #size-cells = <0>;\n+\n+ adc@0 {\n+ compatible = \"adi,ad4692\";\n+ reg = <0>;\n+ spi-cpol;\n+ spi-cpha;\n+ spi-max-frequency = <40000000>;\n+\n+ avdd-supply = <&avdd_supply>;\n+ vio-supply = <&vio_supply>;\n+ ref-supply = <&ref_5v>;\n+\n+ reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;\n+\n+ pwms = <&pwm_gen 0 0>;\n+\n+ #trigger-source-cells = <1>;\n+ };\n+ };\n+\n+ - |\n+ #include \n+ /* AD4692 in Manual Mode (CNV tied to SPI CS) */\n+ spi {\n+ #address-cells = <1>;\n+ #size-cells = <0>;\n+\n+ adc@0 {\n+ compatible = \"adi,ad4692\";\n+ reg = <0>;\n+ spi-cpol;\n+ spi-cpha;\n+ spi-max-frequency = <31250000>;\n+\n+ avdd-supply = <&avdd_supply>;\n+ vio-supply = <&vio_supply>;\n+ refin-supply = <&refin_supply>;\n+\n+ reset-gpios = <&gpio0 15 GPIO_ACTIVE_LOW>;\n+ };\n+ };\ndiff --git a/MAINTAINERS b/MAINTAINERS\nindex 61bf550fd37c..438ca850fa1c 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -1484,6 +1484,13 @@ W:\thttps://ez.analog.com/linux-software-drivers\n F:\tDocumentation/devicetree/bindings/iio/adc/adi,ad4170-4.yaml\n F:\tdrivers/iio/adc/ad4170-4.c\n \n+ANALOG DEVICES INC AD4691 DRIVER\n+M:\tRadu Sabau \n+L:\tlinux-iio@vger.kernel.org\n+S:\tSupported\n+W:\thttps://ez.analog.com/linux-software-drivers\n+F:\tDocumentation/devicetree/bindings/iio/adc/adi,ad4691.yaml\n+\n ANALOG DEVICES INC AD4695 DRIVER\n M:\tMichael Hennerich \n M:\tNuno Sá \n","prefixes":["v6","1/4"]}