{"id":2219487,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2219487/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260403053748.78831-8-mohamed@unpredictable.fr>","date":"2026-04-03T05:37:48","name":"[v4,7/7] whpx: i386: introduce proper cpuid support","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"ffdf1f83b1429b126706ef2c0868fb1862141757","submitter":{"id":91318,"url":"http://patchwork.ozlabs.org/api/1.0/people/91318/?format=json","name":"Mohamed Mediouni","email":"mohamed@unpredictable.fr"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260403053748.78831-8-mohamed@unpredictable.fr/mbox/","series":[{"id":498589,"url":"http://patchwork.ozlabs.org/api/1.0/series/498589/?format=json","date":"2026-04-03T05:37:41","name":"whpx: i386: x2apic emulation for kernel-irqchip=off, feature probing","version":4,"mbox":"http://patchwork.ozlabs.org/series/498589/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219487/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=dzjqoxPN;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fn6wZ6wxPz1yCs\n\tfor ; Fri, 03 Apr 2026 16:39:10 +1100 (AEDT)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1w8XEO-0004HV-2t; Fri, 03 Apr 2026 01:38:08 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w8XEM-0004H5-Ax\n for qemu-devel@nongnu.org; Fri, 03 Apr 2026 01:38:06 -0400","from qs-2001d-snip4-5.eps.apple.com ([57.103.87.38]\n helo=outbound.qs.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w8XEK-0008AO-PU\n for qemu-devel@nongnu.org; Fri, 03 Apr 2026 01:38:06 -0400","from outbound.qs.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-east-2d-100-percent-4 (Postfix) with ESMTPS id\n BAAE41800138; Fri, 03 Apr 2026 05:38:01 +0000 (UTC)","from localhost.localdomain (unknown [17.57.155.37])\n by p00-icloudmta-asmtp-us-east-2d-100-percent-4 (Postfix) with ESMTPSA id\n 16D5C180012D; Fri, 03 Apr 2026 05:37:59 +0000 (UTC)"],"Dkim-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1775194684; x=1777786684;\n bh=d6aYMezS4K50QhpFbiouZemcvwz2NgiZB6lHAEg2j7I=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=dzjqoxPNy4U7PSeLoWSZyHcR0AKP1l5LnJkpjsFfqJvThXLv3BEdNc3+KnvfsfrnJpi3RQRQ7gMWO3hGPBSI732w0Rm6GusIe/Z3Znfto+NeRPbgoN7eXE07QKG1Ll36DoenjSsB2tFYPVNFi9qCnZVlo2devJDt+8T/BXb3x0ZYzj14ogViLzmYXqjX6cXs5lN7oFR21NDXAgfdhNuxhxYKut8I2JDW8TKF4ofZnGzM5v+qOigcvcTdPbfFi9QFHG3LYGMN3RKt/qHAYTSUfX0vl12ClC3ljAk7zFPYwhhvTIiKSatHV7PHE9ygca06geCGoLfnSXrJhSRGge8rvw==","mail-alias-created-date":"1752046281608","From":"Mohamed Mediouni ","To":"qemu-devel@nongnu.org","Cc":"Wei Liu , Paolo Bonzini ,\n Zhao Liu , Pedro Barbuda ,\n Phil Dennis-Jordan ,\n Mohamed Mediouni ,\n Roman Bolshakov ","Subject":"[PATCH v4 7/7] whpx: i386: introduce proper cpuid support","Date":"Fri, 3 Apr 2026 07:37:48 +0200","Message-ID":"<20260403053748.78831-8-mohamed@unpredictable.fr>","X-Mailer":"git-send-email 2.50.1","In-Reply-To":"<20260403053748.78831-1-mohamed@unpredictable.fr>","References":"<20260403053748.78831-1-mohamed@unpredictable.fr>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Proofpoint-GUID":"kjzaXStTG-9QVHkF2JuOxcR-I5Ji8OTB","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwNDAzMDA0NyBTYWx0ZWRfX5OMUshRjP4Xe\n Ar6/xJmVEzC+3OdvTN/4u1LEDjFGQt1MmZUqx24dZfflzXrN5Cl9VPYMWy4e6BzTWiQ+Z/WJ4LO\n 4Oecjj8IEp5BBdYz5kbHU1M/YhDaGwXFAgaLTW7g8Cd7pMaMq3U5yXwqRhcOY8kfswZh60fjOc3\n OJwFWhsOE27g2EHLYEcYpnkvdbnQRHF3V79YD88Nu0l8uGmjTcT7342oICTbU3UieWfklPj37JG\n EhylLnwvFhLli33x/jqmd0bgPpxlAa1zPMPHwmDoU5vwx/m9zf/jgZ3zstDi0vN/wlrCTZ5RFMQ\n DFILT7ZmSFGc30y6+N+PR6xKYhc4Cd8UUTJAUitX9NyaFraCw7XipQ9i62TOtM=","X-Authority-Info-Out":"v=2.4 cv=DOiCIiNb c=1 sm=1 tr=0 ts=69cf523a\n cx=c_apl:c_pps:t_out a=bsP7O+dXZ5uKcj+dsLqiMw==:117\n a=bsP7O+dXZ5uKcj+dsLqiMw==:17 a=A5OVakUREuEA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=8S12nBvZezfavlJVhXoA:9","X-Proofpoint-ORIG-GUID":"kjzaXStTG-9QVHkF2JuOxcR-I5Ji8OTB","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-04-03_01,2026-04-02_05,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=notspam policy=default score=0 phishscore=0\n suspectscore=0 mlxlogscore=840 lowpriorityscore=0 malwarescore=0 bulkscore=0\n spamscore=0 clxscore=1030 adultscore=0 mlxscore=0 classifier=spam authscore=0\n adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000\n definitions=main-2604030047","Received-SPF":"pass client-ip=57.103.87.38;\n envelope-from=mohamed@unpredictable.fr; helo=outbound.qs.icloud.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Unlike the implementation in QEMU 10.2, this one works.\n\nIt's not optimal though as it doesn't use the Hyper-V support for this.\n\nSigned-off-by: Mohamed Mediouni \n---\n target/i386/whpx/whpx-all.c | 39 ++++++++++++++++++++++++++++++++++---\n 1 file changed, 36 insertions(+), 3 deletions(-)","diff":"diff --git a/target/i386/whpx/whpx-all.c b/target/i386/whpx/whpx-all.c\nindex 03233d1b94..3e006496be 100644\n--- a/target/i386/whpx/whpx-all.c\n+++ b/target/i386/whpx/whpx-all.c\n@@ -2127,6 +2127,35 @@ int whpx_vcpu_run(CPUState *cpu)\n }\n break;\n }\n+ } else {\n+ switch (vcpu->exit_ctx.CpuidAccess.Rax) {\n+ case 0x40000000:\n+ case 0x40000001:\n+ case 0x40000010:\n+ reg_values[1].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRax;\n+ reg_values[2].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRcx;\n+ reg_values[3].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRdx;\n+ reg_values[4].Reg64 = vcpu->exit_ctx.CpuidAccess.DefaultResultRbx;\n+ break;\n+ }\n+ }\n+\n+ /* Dynamic depending on XCR0 and XSS, so query DefaultResult */\n+ if (vcpu->exit_ctx.CpuidAccess.Rax == 0x07\n+ && vcpu->exit_ctx.CpuidAccess.Rcx == 0) {\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRdx\n+ & CPUID_7_0_EDX_CET_IBT) {\n+ reg_values[3].Reg32 |= CPUID_7_0_EDX_CET_IBT;\n+ } else {\n+ reg_values[3].Reg32 &= ~CPUID_7_0_EDX_CET_IBT;\n+ }\n+\n+ if (vcpu->exit_ctx.CpuidAccess.DefaultResultRcx\n+ & CPUID_7_0_ECX_CET_SHSTK) {\n+ reg_values[2].Reg32 |= CPUID_7_0_ECX_CET_SHSTK;\n+ } else {\n+ reg_values[2].Reg32 &= ~CPUID_7_0_ECX_CET_SHSTK;\n+ }\n }\n \n hr = whp_dispatch.WHvSetVirtualProcessorRegisters(\n@@ -2345,8 +2374,12 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n WHV_CAPABILITY_FEATURES features = {0};\n WHV_PROCESSOR_FEATURES_BANKS processor_features;\n WHV_PROCESSOR_PERFMON_FEATURES perfmon_features;\n- UINT32 cpuidExitList[] = {1};\n- UINT32 cpuidExitList_nohyperv[] = {1, 0x40000000, 0x40000001, 0x40000010};\n+\n+ UINT32 cpuidExitList[] = {0x0, 0x1, 0x6, 0x7, 0x14, 0x24, 0x29, 0x1E,\n+ 0x40000000, 0x40000001, 0x40000010, 0x80000000, 0x80000001,\n+ 0x80000002, 0x80000003, 0x80000004, 0x80000007, 0x80000008,\n+ 0x8000000A, 0x80000021, 0x80000022, 0xC0000000, 0xC0000001};\n+ UINT32 cpuidExitList_legacy_os[] = {1, 0x40000000, 0x40000001, 0x40000010};\n \n whpx = &whpx_global;\n \n@@ -2602,7 +2635,7 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n hr = whp_dispatch.WHvSetPartitionProperty(\n whpx->partition,\n WHvPartitionPropertyCodeCpuidExitList,\n- whpx->hyperv_enlightenments_enabled ? cpuidExitList : cpuidExitList_nohyperv,\n+ !whpx_is_legacy_os() ? cpuidExitList : cpuidExitList_legacy_os,\n RTL_NUMBER_OF(cpuidExitList) * sizeof(UINT32));\n \n if (FAILED(hr)) {\n","prefixes":["v4","7/7"]}