{"id":2219473,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2219473/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260403035541.18355-11-zhenzhong.duan@intel.com>","date":"2026-04-03T03:55:34","name":"[v3,10/14] intel_iommu_accel: Bypass PASID entry addition for just deleted entry","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"52b8ffb3cb582dcf429e5b9fce0a9e36c6da0f71","submitter":{"id":81636,"url":"http://patchwork.ozlabs.org/api/1.0/people/81636/?format=json","name":"Duan, Zhenzhong","email":"zhenzhong.duan@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260403035541.18355-11-zhenzhong.duan@intel.com/mbox/","series":[{"id":498583,"url":"http://patchwork.ozlabs.org/api/1.0/series/498583/?format=json","date":"2026-04-03T03:55:36","name":"intel_iommu: Enable PASID support for passthrough device","version":3,"mbox":"http://patchwork.ozlabs.org/series/498583/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219473/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=KlCrfclv;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fn4gx6fXNz1yCs\n\tfor ; Fri, 03 Apr 2026 14:58:05 +1100 (AEDT)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1w8Ve8-0001MM-4M; Thu, 02 Apr 2026 23:56:36 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w8Ve0-0001L6-QE\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 23:56:30 -0400","from mgamail.intel.com ([198.175.65.19])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w8Vdy-0004N9-Us\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 23:56:28 -0400","from fmviesa007.fm.intel.com ([10.60.135.147])\n by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 02 Apr 2026 20:56:26 -0700","from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229])\n by fmviesa007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 02 Apr 2026 20:56:23 -0700"],"DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1775188587; x=1806724587;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=mfXdfQl9POujA0hQEorAHvjyvPh51rTk6rz0RNAFMBU=;\n b=KlCrfclvCivFL4c6VctewMpjn8TSTrwnFCiB8CcLqb0adMoWdPsfwOvC\n g4h56mSmbo/CK9pMA8YDK/bUnmXPLbL2ZbYmA9nbF5ZjFSbL3EHxjwsxw\n cijYn8zI0WVDORYe1HBHxgTCT2xFAF09geF8R7o++94bX2kTGM/WA9jgh\n dv24tv3CaZZtD9oz4xWj1G/lpinr5ePwl/WAx875WI3aJQWW574RaB5v1\n csXuvsm5BCZUdswacjk3ZO/rhIXI7fo0iBBxxN028yuIxJnZTsd9S6DCK\n mDibmjElErLcGeFDM64GsHNdY/DuO5ck9ShgMfBdubd9T20zXoCvgu8ID A==;","X-CSE-ConnectionGUID":["kRUrvwVYSEuHzDsZzRcDrg==","dmytq7ywRkuErKUxuHYG2g=="],"X-CSE-MsgGUID":["EXRz7F7zQS+LD3JX6/pW6A==","MXyG1X11RqizFhwtkTjPNA=="],"X-IronPort-AV":["E=McAfee;i=\"6800,10657,11747\"; a=\"76140666\"","E=Sophos;i=\"6.23,157,1770624000\"; d=\"scan'208\";a=\"76140666\"","E=Sophos;i=\"6.23,157,1770624000\"; d=\"scan'208\";a=\"223884918\""],"X-ExtLoop1":"1","From":"Zhenzhong Duan ","To":"qemu-devel@nongnu.org","Cc":"alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@bull.com, kevin.tian@intel.com, yi.l.liu@intel.com,\n xudong.hao@intel.com, Zhenzhong Duan ","Subject":"[PATCH v3 10/14] intel_iommu_accel: Bypass PASID entry addition for\n just deleted entry","Date":"Thu, 2 Apr 2026 23:55:34 -0400","Message-ID":"<20260403035541.18355-11-zhenzhong.duan@intel.com>","X-Mailer":"git-send-email 2.47.3","In-Reply-To":"<20260403035541.18355-1-zhenzhong.duan@intel.com>","References":"<20260403035541.18355-1-zhenzhong.duan@intel.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=198.175.65.19;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com","X-Spam_score_int":"-48","X-Spam_score":"-4.9","X-Spam_bar":"----","X-Spam_report":"(-4.9 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.542,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"For VTD_INV_DESC_PASIDC_G_PASID_SI typed pc_inv_dsc invalidation, if an\npasid entry is just removed, it can never be a new entry to add. So\ncalling vtd_replay_pasid_bind_for_dev() is unnecessary.\n\nIntroduce a new field accel_pce_deleted in VTDPASIDCacheInfo to mark\nthis case and to do the bypassing.\n\nSuggested-by: Yi Liu \nSigned-off-by: Zhenzhong Duan \nTested-by: Xudong Hao \n---\n hw/i386/intel_iommu_internal.h | 1 +\n hw/i386/intel_iommu_accel.c | 16 +++++++++++++---\n 2 files changed, 14 insertions(+), 3 deletions(-)","diff":"diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h\nindex 623dc24760..2c716c5297 100644\n--- a/hw/i386/intel_iommu_internal.h\n+++ b/hw/i386/intel_iommu_internal.h\n@@ -630,6 +630,7 @@ typedef struct VTDPASIDCacheInfo {\n uint8_t type;\n uint16_t did;\n uint32_t pasid;\n+ bool accel_pce_deleted;\n } VTDPASIDCacheInfo;\n \n typedef struct VTDPIOTLBInvInfo {\ndiff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c\nindex b951d90135..457fdcba62 100644\n--- a/hw/i386/intel_iommu_accel.c\n+++ b/hw/i386/intel_iommu_accel.c\n@@ -302,10 +302,15 @@ static void vtd_accel_fill_pc(VTDHostIOMMUDevice *vtd_hiod, uint32_t pasid,\n QLIST_INSERT_HEAD(&vtd_hiod->pasid_cache_list, vtd_pce, next);\n }\n \n-static void vtd_accel_delete_pc(VTDAccelPASIDCacheEntry *vtd_pce)\n+static void vtd_accel_delete_pc(VTDAccelPASIDCacheEntry *vtd_pce,\n+ VTDPASIDCacheInfo *pc_info)\n {\n QLIST_REMOVE(vtd_pce, next);\n g_free(vtd_pce);\n+\n+ if (pc_info->type == VTD_INV_DESC_PASIDC_G_PASID_SI) {\n+ pc_info->accel_pce_deleted = true;\n+ }\n }\n \n static void\n@@ -339,7 +344,7 @@ vtd_accel_pasid_cache_invalidate_one(VTDAccelPASIDCacheEntry *vtd_pce,\n * to be either all-zero or non-present. Either case means existing\n * pasid cache should be invalidated.\n */\n- vtd_accel_delete_pc(vtd_pce);\n+ vtd_accel_delete_pc(vtd_pce, pc_info);\n }\n }\n \n@@ -502,7 +507,12 @@ void vtd_accel_pasid_cache_sync(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info)\n * removed.\n */\n vtd_accel_pasid_cache_invalidate(vtd_hiod, pc_info);\n- vtd_accel_replay_pasid_bind_for_dev(vtd_hiod, start, end, pc_info);\n+\n+ if (pc_info->accel_pce_deleted) {\n+ pc_info->accel_pce_deleted = false;\n+ } else {\n+ vtd_accel_replay_pasid_bind_for_dev(vtd_hiod, start, end, pc_info);\n+ }\n }\n }\n \n","prefixes":["v3","10/14"]}