{"id":2219465,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2219465/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260403035541.18355-3-zhenzhong.duan@intel.com>","date":"2026-04-03T03:55:26","name":"[v3,02/14] iommufd: Extend attach/detach_hwpt callbacks to support pasid","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"b1ed28023d7f304ff4d8595030e8f758d73bd765","submitter":{"id":81636,"url":"http://patchwork.ozlabs.org/api/1.0/people/81636/?format=json","name":"Duan, Zhenzhong","email":"zhenzhong.duan@intel.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260403035541.18355-3-zhenzhong.duan@intel.com/mbox/","series":[{"id":498583,"url":"http://patchwork.ozlabs.org/api/1.0/series/498583/?format=json","date":"2026-04-03T03:55:36","name":"intel_iommu: Enable PASID support for passthrough device","version":3,"mbox":"http://patchwork.ozlabs.org/series/498583/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219465/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=F1rst69L;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Same for the two wrappers and their call sites.\n\nSuggested-by: Shameer Kolothum Thodi \nSuggested-by: Nicolin Chen \nSigned-off-by: Zhenzhong Duan \nReviewed-by: Yi Liu \nReviewed-by: Nicolin Chen \nTested-by: Xudong Hao \n---\n include/system/iommufd.h | 16 +++++++++++-----\n backends/iommufd.c | 9 +++++----\n hw/arm/smmuv3-accel.c | 12 ++++++++----\n hw/i386/intel_iommu_accel.c | 19 ++++++++++---------\n hw/vfio/iommufd.c | 10 +++++-----\n 5 files changed, 39 insertions(+), 27 deletions(-)","diff":"diff --git a/include/system/iommufd.h b/include/system/iommufd.h\nindex 2925d116ac..da98e79439 100644\n--- a/include/system/iommufd.h\n+++ b/include/system/iommufd.h\n@@ -138,14 +138,16 @@ struct HostIOMMUDeviceIOMMUFDClass {\n *\n * @hiodi: host IOMMU device backed by IOMMUFD backend.\n *\n+ * @pasid: target pasid of the device to be attached.\n+ *\n * @hwpt_id: ID of IOMMUFD hardware page table.\n *\n * @errp: pass an Error out when attachment fails.\n *\n * Returns: true on success, false on failure.\n */\n- bool (*attach_hwpt)(HostIOMMUDeviceIOMMUFD *hiodi, uint32_t hwpt_id,\n- Error **errp);\n+ bool (*attach_hwpt)(HostIOMMUDeviceIOMMUFD *hiodi, uint32_t pasid,\n+ uint32_t hwpt_id, Error **errp);\n /**\n * @detach_hwpt: detach host IOMMU device from IOMMUFD hardware page table.\n * VFIO and VDPA device can have different implementation.\n@@ -154,15 +156,19 @@ struct HostIOMMUDeviceIOMMUFDClass {\n *\n * @hiodi: host IOMMU device backed by IOMMUFD backend.\n *\n+ * @pasid: target pasid of the device to be detached.\n+ *\n * @errp: pass an Error out when attachment fails.\n *\n * Returns: true on success, false on failure.\n */\n- bool (*detach_hwpt)(HostIOMMUDeviceIOMMUFD *hiodi, Error **errp);\n+ bool (*detach_hwpt)(HostIOMMUDeviceIOMMUFD *hiodi, uint32_t pasid,\n+ Error **errp);\n };\n \n bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n- uint32_t hwpt_id, Error **errp);\n-bool host_iommu_device_iommufd_detach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n+ uint32_t pasid, uint32_t hwpt_id,\n Error **errp);\n+bool host_iommu_device_iommufd_detach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n+ uint32_t pasid, Error **errp);\n #endif\ndiff --git a/backends/iommufd.c b/backends/iommufd.c\nindex 410b044370..cfde6f2b2c 100644\n--- a/backends/iommufd.c\n+++ b/backends/iommufd.c\n@@ -539,23 +539,24 @@ bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id,\n }\n \n bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n- uint32_t hwpt_id, Error **errp)\n+ uint32_t pasid, uint32_t hwpt_id,\n+ Error **errp)\n {\n HostIOMMUDeviceIOMMUFDClass *hiodic =\n HOST_IOMMU_DEVICE_IOMMUFD_GET_CLASS(hiodi);\n \n g_assert(hiodic->attach_hwpt);\n- return hiodic->attach_hwpt(hiodi, hwpt_id, errp);\n+ return hiodic->attach_hwpt(hiodi, pasid, hwpt_id, errp);\n }\n \n bool host_iommu_device_iommufd_detach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n- Error **errp)\n+ uint32_t pasid, Error **errp)\n {\n HostIOMMUDeviceIOMMUFDClass *hiodic =\n HOST_IOMMU_DEVICE_IOMMUFD_GET_CLASS(hiodi);\n \n g_assert(hiodic->detach_hwpt);\n- return hiodic->detach_hwpt(hiodi, errp);\n+ return hiodic->detach_hwpt(hiodi, pasid, errp);\n }\n \n static int hiod_iommufd_get_cap(HostIOMMUDevice *hiod, int cap, Error **errp)\ndiff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c\nindex 3630078751..3201bb25af 100644\n--- a/hw/arm/smmuv3-accel.c\n+++ b/hw/arm/smmuv3-accel.c\n@@ -300,7 +300,8 @@ bool smmuv3_accel_install_ste(SMMUv3State *s, SMMUDevice *sdev, int sid,\n return false;\n }\n \n- if (!host_iommu_device_iommufd_attach_hwpt(hiodi, hwpt_id, errp)) {\n+ if (!host_iommu_device_iommufd_attach_hwpt(hiodi, IOMMU_NO_PASID, hwpt_id,\n+ errp)) {\n if (s1_hwpt) {\n iommufd_backend_free_id(hiodi->iommufd, s1_hwpt->hwpt_id);\n g_free(s1_hwpt);\n@@ -575,7 +576,8 @@ smmuv3_accel_alloc_viommu(SMMUv3State *s, HostIOMMUDeviceIOMMUFD *hiodi,\n \n /* Attach a HWPT based on SMMUv3 GBPA.ABORT value */\n hwpt_id = smmuv3_accel_gbpa_hwpt(s, accel);\n- if (!host_iommu_device_iommufd_attach_hwpt(hiodi, hwpt_id, errp)) {\n+ if (!host_iommu_device_iommufd_attach_hwpt(hiodi, IOMMU_NO_PASID, hwpt_id,\n+ errp)) {\n goto free_veventq;\n }\n return true;\n@@ -665,7 +667,8 @@ static void smmuv3_accel_unset_iommu_device(PCIBus *bus, void *opaque,\n hiodi = accel_dev->hiodi;\n accel = accel_dev->s_accel;\n /* Re-attach the default s2 hwpt id */\n- if (!host_iommu_device_iommufd_attach_hwpt(hiodi, hiodi->hwpt_id, NULL)) {\n+ if (!host_iommu_device_iommufd_attach_hwpt(hiodi, IOMMU_NO_PASID,\n+ hiodi->hwpt_id, NULL)) {\n error_report(\"Unable to attach the default HW pagetable: hiodi devid \"\n \"0x%x\", hiodi->devid);\n }\n@@ -879,7 +882,8 @@ bool smmuv3_accel_attach_gbpa_hwpt(SMMUv3State *s, Error **errp)\n \n hwpt_id = smmuv3_accel_gbpa_hwpt(s, accel);\n QLIST_FOREACH(accel_dev, &accel->device_list, next) {\n- if (!host_iommu_device_iommufd_attach_hwpt(accel_dev->hiodi, hwpt_id,\n+ if (!host_iommu_device_iommufd_attach_hwpt(accel_dev->hiodi,\n+ IOMMU_NO_PASID, hwpt_id,\n &local_err)) {\n error_append_hint(&local_err, \"Failed to attach GBPA hwpt %u for \"\n \"hiodi devid %u\", hwpt_id,\ndiff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c\nindex ed3793602b..3217a2afac 100644\n--- a/hw/i386/intel_iommu_accel.c\n+++ b/hw/i386/intel_iommu_accel.c\n@@ -121,8 +121,9 @@ static bool vtd_device_attach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n }\n }\n \n- ret = host_iommu_device_iommufd_attach_hwpt(hiodi, hwpt_id, errp);\n- trace_vtd_device_attach_hwpt(hiodi->devid, vtd_as->pasid, hwpt_id, ret);\n+ ret = host_iommu_device_iommufd_attach_hwpt(hiodi, IOMMU_NO_PASID, hwpt_id,\n+ errp);\n+ trace_vtd_device_attach_hwpt(hiodi->devid, IOMMU_NO_PASID, hwpt_id, ret);\n if (ret) {\n /* Destroy old fs_hwpt if it's a replacement */\n vtd_destroy_old_fs_hwpt(hiodi, vtd_as);\n@@ -141,22 +142,22 @@ static bool vtd_device_detach_iommufd(VTDHostIOMMUDevice *vtd_hiod,\n {\n HostIOMMUDeviceIOMMUFD *hiodi = HOST_IOMMU_DEVICE_IOMMUFD(vtd_hiod->hiod);\n IntelIOMMUState *s = vtd_as->iommu_state;\n- uint32_t pasid = vtd_as->pasid;\n bool ret;\n \n if (s->dmar_enabled && s->root_scalable) {\n- ret = host_iommu_device_iommufd_detach_hwpt(hiodi, errp);\n- trace_vtd_device_detach_hwpt(hiodi->devid, pasid, ret);\n+ ret = host_iommu_device_iommufd_detach_hwpt(hiodi, IOMMU_NO_PASID,\n+ errp);\n+ trace_vtd_device_detach_hwpt(hiodi->devid, IOMMU_NO_PASID, ret);\n } else {\n /*\n * If DMAR remapping is disabled or guest switches to legacy mode,\n * we fallback to the default HWPT which contains shadow page table.\n * So guest DMA could still work.\n */\n- ret = host_iommu_device_iommufd_attach_hwpt(hiodi, hiodi->hwpt_id,\n- errp);\n- trace_vtd_device_reattach_def_hwpt(hiodi->devid, pasid, hiodi->hwpt_id,\n- ret);\n+ ret = host_iommu_device_iommufd_attach_hwpt(hiodi, IOMMU_NO_PASID,\n+ hiodi->hwpt_id, errp);\n+ trace_vtd_device_reattach_def_hwpt(hiodi->devid, IOMMU_NO_PASID,\n+ hiodi->hwpt_id, ret);\n }\n \n if (ret) {\ndiff --git a/hw/vfio/iommufd.c b/hw/vfio/iommufd.c\nindex f020b56208..ecabc33064 100644\n--- a/hw/vfio/iommufd.c\n+++ b/hw/vfio/iommufd.c\n@@ -927,21 +927,21 @@ static void vfio_iommu_iommufd_class_init(ObjectClass *klass, const void *data)\n \n static bool\n host_iommu_device_iommufd_vfio_attach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n- uint32_t hwpt_id, Error **errp)\n+ uint32_t pasid, uint32_t hwpt_id,\n+ Error **errp)\n {\n VFIODevice *vbasedev = HOST_IOMMU_DEVICE(hiodi)->agent;\n \n- return !iommufd_cdev_pasid_attach_ioas_hwpt(vbasedev, IOMMU_NO_PASID,\n- hwpt_id, errp);\n+ return !iommufd_cdev_pasid_attach_ioas_hwpt(vbasedev, pasid, hwpt_id, errp);\n }\n \n static bool\n host_iommu_device_iommufd_vfio_detach_hwpt(HostIOMMUDeviceIOMMUFD *hiodi,\n- Error **errp)\n+ uint32_t pasid, Error **errp)\n {\n VFIODevice *vbasedev = HOST_IOMMU_DEVICE(hiodi)->agent;\n \n- return iommufd_cdev_pasid_detach_ioas_hwpt(vbasedev, IOMMU_NO_PASID, errp);\n+ return iommufd_cdev_pasid_detach_ioas_hwpt(vbasedev, pasid, errp);\n }\n \n static bool hiod_iommufd_vfio_realize(HostIOMMUDevice *hiod, void *opaque,\n","prefixes":["v3","02/14"]}