{"id":2219358,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2219358/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260402215629.745866-17-ruslichenko.r@gmail.com>","date":"2026-04-02T21:56:01","name":"[v3,16/33] hw/core/fdt_generic_util: map device memory regions","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"6398aa8811955e5b75479c6da54e3a23d3720ba3","submitter":{"id":92275,"url":"http://patchwork.ozlabs.org/api/1.0/people/92275/?format=json","name":"Ruslan Ruslichenko","email":"ruslichenko.r@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260402215629.745866-17-ruslichenko.r@gmail.com/mbox/","series":[{"id":498555,"url":"http://patchwork.ozlabs.org/api/1.0/series/498555/?format=json","date":"2026-04-02T21:55:47","name":"hw/arm: Introduce generic FDT-driven machine","version":3,"mbox":"http://patchwork.ozlabs.org/series/498555/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219358/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=CRDjOgcA;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)"],"Received":["from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fmwmJ3syLz1xtJ\n\tfor ; Fri, 03 Apr 2026 09:01:20 +1100 (AEDT)","from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from )\n\tid 1w8Q2X-00005m-Au; Thu, 02 Apr 2026 17:57:25 -0400","from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from )\n id 1w8Q2N-0008MW-2s\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 17:57:15 -0400","from mail-ej1-x62b.google.com ([2a00:1450:4864:20::62b])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from )\n id 1w8Q2L-00079c-0p\n for qemu-devel@nongnu.org; Thu, 02 Apr 2026 17:57:14 -0400","by mail-ej1-x62b.google.com with SMTP id\n a640c23a62f3a-b9b1ffbb9f5so154422666b.2\n for ; Thu, 02 Apr 2026 14:57:12 -0700 (PDT)","from thinkpad-t470s.. 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Iglesias\" ,\n Ruslan_Ruslichenko@epam.com, balaton@eik.bme.hu","Subject":"[PATCH v3 16/33] hw/core/fdt_generic_util: map device memory regions","Date":"Thu, 2 Apr 2026 23:56:01 +0200","Message-ID":"<20260402215629.745866-17-ruslichenko.r@gmail.com>","X-Mailer":"git-send-email 2.43.0","In-Reply-To":"<20260402215629.745866-1-ruslichenko.r@gmail.com>","References":"<20260402215629.745866-1-ruslichenko.r@gmail.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::62b;\n envelope-from=ruslichenko.r@gmail.com; helo=mail-ej1-x62b.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Ruslan Ruslichenko \n\nParse device mmio regions provided within standard 'reg' and\ncustom 'reg-extended' device tree properties.\n\nFor 'reg-extended' properties, the parent phandle is extracted\nalong with the standard io memory region specification, which allows\nadding these regions to specified parent memory regions.\n\nThe mapping itself is delegated to the device via the\n'TYPE_FDT_GENERIC_MMAP' interface.\n\nSigned-off-by: Ruslan Ruslichenko \n---\n hw/core/fdt_generic_util.c | 158 +++++++++++++++++++++++++++++\n include/hw/core/fdt_generic_util.h | 6 ++\n 2 files changed, 164 insertions(+)","diff":"diff --git a/hw/core/fdt_generic_util.c b/hw/core/fdt_generic_util.c\nindex 51b808d9d0..0b374b550d 100644\n--- a/hw/core/fdt_generic_util.c\n+++ b/hw/core/fdt_generic_util.c\n@@ -403,6 +403,22 @@ static inline uint64_t get_int_be(const void *p, int len)\n }\n }\n \n+/* FIXME: use structs instead of parallel arrays */\n+\n+static const char *fdt_generic_reg_size_prop_names[] = {\n+ \"#address-cells\",\n+ \"#size-cells\",\n+ \"#bus-cells\",\n+ \"#priority-cells\",\n+};\n+\n+static const int fdt_generic_reg_cells_defaults[] = {\n+ 1,\n+ 1,\n+ 0,\n+ 0,\n+};\n+\n static void fdt_init_qdev_link_prop(Object *obj, ObjectProperty *p,\n FDTMachineInfo *fdti,\n const char *node_path,\n@@ -616,6 +632,146 @@ static void fdt_init_qdev_properties(char *node_path, FDTMachineInfo *fdti,\n }\n }\n \n+FDTGenericRegPropInfo*\n+fdt_get_reg_info(FDTMachineInfo *fdti, char *node_path, Object *dev)\n+{\n+ FDTGenericRegPropInfo *reg;\n+ Object *parent = NULL;\n+ char *parent_path = NULL;\n+ int cell_idx = 0;\n+ bool extended = true;\n+ Error *errp = NULL;\n+ int i;\n+\n+ if (!object_dynamic_cast(dev, TYPE_SYS_BUS_DEVICE) &&\n+ !object_dynamic_cast(dev, TYPE_FDT_GENERIC_MMAP)) {\n+ return NULL;\n+ }\n+\n+ reg = g_new0(FDTGenericRegPropInfo, 1);\n+\n+ qemu_fdt_getprop_cell(fdti->fdt, node_path, \"reg-extended\", 0,\n+ &errp);\n+ if (errp) {\n+ error_free(errp);\n+ errp = NULL;\n+ extended = false;\n+ parent_path = qemu_devtree_getparent(fdti->fdt, node_path);\n+ }\n+\n+ if (parent_path) {\n+ parent = fdt_init_get_opaque(fdti, parent_path);\n+ }\n+\n+ for (reg->n = 0;; reg->n++) {\n+ char ph_parent[DT_PATH_LENGTH];\n+ const char *pnp = parent_path;\n+\n+ reg->parents = g_renew(Object *, reg->parents, reg->n + 1);\n+ reg->parents[reg->n] = parent;\n+\n+ if (extended) {\n+ int p_ph = qemu_fdt_getprop_cell(fdti->fdt, node_path,\n+ \"reg-extended\", cell_idx++,\n+ &errp);\n+ if (errp) {\n+ error_free(errp);\n+ errp = NULL;\n+ goto exit_reg_parse;\n+ }\n+ if (qemu_devtree_get_node_by_phandle(fdti->fdt, ph_parent,\n+ p_ph)) {\n+ goto exit_reg_parse;\n+ }\n+\n+ while (!fdt_init_has_opaque(fdti, ph_parent) &&\n+ qemu_in_coroutine()) {\n+ fdt_init_yield(fdti);\n+ }\n+\n+ if (!fdt_init_has_opaque(fdti, ph_parent)) {\n+ goto exit_reg_parse;\n+ }\n+\n+ reg->parents[reg->n] = fdt_init_get_opaque(fdti, ph_parent);\n+ pnp = ph_parent;\n+ }\n+\n+ for (i = 0; i < FDT_GENERIC_REG_TUPLE_LENGTH; ++i) {\n+ const char *size_prop_name = fdt_generic_reg_size_prop_names[i];\n+ int nc = qemu_fdt_getprop_cell_inherited(fdti->fdt, node_path,\n+ size_prop_name, 0, &errp);\n+ uint64_t val = 0;\n+\n+ if (errp) {\n+ int size_default = fdt_generic_reg_cells_defaults[i];\n+\n+ fdt_debug_np(\"WARNING: no %s for %s container, assuming \"\n+ \"default of %d\\n\", size_prop_name, pnp,\n+ size_default);\n+ nc = size_default;\n+ error_free(errp);\n+ errp = NULL;\n+ }\n+\n+ reg->x[i] = g_renew(uint64_t, reg->x[i], reg->n + 1);\n+ for (int j = 0; j < nc; ++j) {\n+ val <<= 32;\n+ val |= qemu_fdt_getprop_cell(fdti->fdt, node_path,\n+ extended ? \"reg-extended\"\n+ : \"reg\",\n+ cell_idx + j, &errp);\n+ if (errp) {\n+ val = 0;\n+ break;\n+ }\n+ }\n+ reg->x[i][reg->n] = val;\n+ cell_idx += nc;\n+ if (errp) {\n+ goto exit_reg_parse;\n+ }\n+ }\n+ }\n+exit_reg_parse:\n+ if (errp) {\n+ error_free(errp);\n+ }\n+\n+ g_free(parent_path);\n+\n+ return reg;\n+}\n+\n+static void fdt_parse_node_reg_prop(FDTMachineInfo *fdti, char *node_path,\n+ Object *dev)\n+{\n+ int i;\n+\n+ FDTGenericRegPropInfo *reg = fdt_get_reg_info(fdti, node_path, dev);\n+ if (!reg) {\n+ return;\n+ }\n+\n+ if (object_dynamic_cast(dev, TYPE_FDT_GENERIC_MMAP)) {\n+ FDTGenericMMapClass *fmc = FDT_GENERIC_MMAP_GET_CLASS(dev);\n+ if (fmc->parse_reg) {\n+ while (fmc->parse_reg(FDT_GENERIC_MMAP(dev), *reg,\n+ &error_abort) && qemu_in_coroutine()) {\n+ fdt_init_yield(fdti);\n+ }\n+ }\n+ }\n+\n+ g_free(reg->parents);\n+\n+ for (i = 0; i < FDT_GENERIC_REG_TUPLE_LENGTH; ++i) {\n+ g_free(reg->x[i]);\n+ }\n+\n+ g_free(reg);\n+}\n+\n static void fdt_init_parent_node(Object *dev, Object *parent, char *node_path)\n {\n if (dev->parent) {\n@@ -744,6 +900,8 @@ static int fdt_init_qdev(char *node_path, FDTMachineInfo *fdti, char *compat)\n \n fdt_init_device_realize(fdti, node_path, dev);\n \n+ fdt_parse_node_reg_prop(fdti, node_path, dev);\n+\n g_free(parent_node_path);\n \n return 0;\ndiff --git a/include/hw/core/fdt_generic_util.h b/include/hw/core/fdt_generic_util.h\nindex 6fb0708d7a..a04ded41ae 100644\n--- a/include/hw/core/fdt_generic_util.h\n+++ b/include/hw/core/fdt_generic_util.h\n@@ -127,6 +127,12 @@ typedef struct FDTGenericRegPropInfo {\n Object **parents;\n } FDTGenericRegPropInfo;\n \n+/*\n+ * Get parsed 'reg' or 'reg-extended' properties from dts node\n+ */\n+FDTGenericRegPropInfo*\n+fdt_get_reg_info(FDTMachineInfo *fdti, char *node_path, Object *dev);\n+\n typedef struct FDTGenericMMapClass {\n /*< private >*/\n InterfaceClass parent_class;\n","prefixes":["v3","16/33"]}