{"id":2219164,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2219164/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260402-write_booster-v1-3-e4fed1df6c7e@samsung.com>","date":"2026-04-02T09:43:47","name":"[3/5] hw/ufs: Add idle operation","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a136089e524071571f6a211d765d4b9dd1336c43","submitter":{"id":93039,"url":"http://patchwork.ozlabs.org/api/1.0/people/93039/?format=json","name":"Jaemyung Lee","email":"ldc.jml@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260402-write_booster-v1-3-e4fed1df6c7e@samsung.com/mbox/","series":[{"id":498486,"url":"http://patchwork.ozlabs.org/api/1.0/series/498486/?format=json","date":"2026-04-02T09:43:48","name":"hw/ufs: Add Write Booster Support on UFS","version":1,"mbox":"http://patchwork.ozlabs.org/series/498486/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219164/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20251104 header.b=UURZvFtR;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260402-write_booster-v1-3-e4fed1df6c7e@samsung.com>","References":"<20260402-write_booster-v1-0-e4fed1df6c7e@samsung.com>","In-Reply-To":"<20260402-write_booster-v1-0-e4fed1df6c7e@samsung.com>","To":"qemu-devel@nongnu.org","Cc":"Jeuk Kim , Kevin Wolf ,\n Hanna Reitz , qemu-block@nongnu.org,\n Fabiano Rosas , Laurent Vivier ,\n Paolo Bonzini ,\n Jaemyung Lee ","X-Mailer":"b4 0.14.2","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1775123032; l=2916;\n i=jaemyung.lee@samsung.com; s=20260402; h=from:subject:message-id;\n bh=/YX9M0/8utB10RyJw1Al6+6NhTczJLb9C2D6zloxtfQ=;\n b=MaUmkDUTMfV4ai3EE2sxjNQfLI2ZCCsmJroS/6g1hn3HdGK2LwFbFpi/I1WQw2yb0Ls9Hg10i\n Ew5K1qMNhKZDA+DkZtf+Opz1zH/oJUPe2lcKWZuM68U1yA36n5BV+WU","X-Developer-Key":"i=jaemyung.lee@samsung.com; a=ed25519;\n pk=bZPd7A/kteUO62FfUM6IrI1LuBPe5QrcqfvsitM1ZjE=","Received-SPF":"pass client-ip=2607:f8b0:4864:20::42e;\n envelope-from=ldc.jml@gmail.com; helo=mail-pf1-x42e.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-Mailman-Approved-At":"Thu, 02 Apr 2026 09:51:40 -0400","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"When no I/O occurs, the UFS Device performs various internal operations.\nTo emulate this, adds a timer that periodically checks the current I/O\nstatus of the device and call the ufs_process_idle() function when idle.\n\nSigned-off-by: Jaemyung Lee \n---\n hw/ufs/ufs.c | 47 +++++++++++++++++++++++++++++++++++++++++++++++\n hw/ufs/ufs.h | 2 ++\n 2 files changed, 49 insertions(+)","diff":"diff --git a/hw/ufs/ufs.c b/hw/ufs/ufs.c\nindex 69f82ab462d135fe6cda479891f9d8f26d19be9a..111ce3c3a0b03a1ead722f48b799e3ed0c403cce 100644\n--- a/hw/ufs/ufs.c\n+++ b/hw/ufs/ufs.c\n@@ -1801,6 +1801,47 @@ static void ufs_sendback_req(void *opaque)\n ufs_irq_check(u);\n }\n \n+static void ufs_process_idle(UfsHc *u)\n+{\n+ /* Currently do nothing */\n+ return;\n+}\n+\n+static inline bool ufs_check_idle(UfsHc *u)\n+{\n+ return !u->reg.utrldbr;\n+}\n+\n+static inline bool ufs_mcq_check_idle(UfsHc *u)\n+{\n+ for (int i = 0; i < ARRAY_SIZE(u->sq); i++) {\n+ if (!ufs_mcq_sq_empty(u, i)) {\n+ return false;\n+ }\n+ }\n+\n+ for (int i = 0; i < ARRAY_SIZE(u->cq); i++) {\n+ if (!ufs_mcq_cq_empty(u, i)) {\n+ return false;\n+ }\n+ }\n+\n+ return true;\n+}\n+\n+#define UFS_IDLE_TIMER_TICK 100 /* 0.1s */\n+static void ufs_idle_timer_cb(void *opaque)\n+{\n+ UfsHc *u = opaque;\n+ int64_t now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL_RT);\n+\n+ if (ufs_check_idle(u) && ufs_mcq_check_idle(u)) {\n+ ufs_process_idle(u);\n+ }\n+\n+ timer_mod(&u->idle_timer, now + UFS_IDLE_TIMER_TICK);\n+}\n+\n static bool ufs_check_constraints(UfsHc *u, Error **errp)\n {\n if (u->params.nutrs > UFS_MAX_NUTRS) {\n@@ -1863,6 +1904,7 @@ static void ufs_init_hc(UfsHc *u)\n uint32_t cap = 0;\n uint32_t mcqconfig = 0;\n uint32_t mcqcap = 0;\n+ int64_t now = qemu_clock_get_ms(QEMU_CLOCK_VIRTUAL_RT);\n \n u->reg_size = pow2ceil(ufs_reg_size(u));\n \n@@ -1959,6 +2001,9 @@ static void ufs_init_hc(UfsHc *u)\n * dynamically\n */\n u->temperature = UFS_TEMPERATURE;\n+\n+ timer_init_ms(&u->idle_timer, QEMU_CLOCK_VIRTUAL_RT, ufs_idle_timer_cb, u);\n+ timer_mod(&u->idle_timer, now + UFS_IDLE_TIMER_TICK);\n }\n \n static void ufs_realize(PCIDevice *pci_dev, Error **errp)\n@@ -1986,6 +2031,8 @@ static void ufs_exit(PCIDevice *pci_dev)\n {\n UfsHc *u = UFS(pci_dev);\n \n+ timer_del(&u->idle_timer);\n+\n qemu_free_irq(u->irq);\n \n qemu_bh_delete(u->doorbell_bh);\ndiff --git a/hw/ufs/ufs.h b/hw/ufs/ufs.h\nindex 13d964c5ae5ec430a98b2ef71987cb9279e9a317..b5f040302129f4d02732ddd20ef82eb33c41922a 100644\n--- a/hw/ufs/ufs.h\n+++ b/hw/ufs/ufs.h\n@@ -148,6 +148,8 @@ typedef struct UfsHc {\n UfsCq *cq[UFS_MAX_MCQ_QNUM];\n \n uint8_t temperature;\n+\n+ QEMUTimer idle_timer;\n } UfsHc;\n \n static inline uint32_t ufs_mcq_sq_tail(UfsHc *u, uint32_t qid)\n","prefixes":["3/5"]}