{"id":2219145,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2219145/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260402-mshv_accel_arm64_supp-v2-1-754895c15e9e@linux.microsoft.com>","date":"2026-04-02T12:52:28","name":"[v2,01/14] accel/mshv: move msr.c to target/i386","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a8db3b59a9b72fca6028fafc11141b4818d3f462","submitter":{"id":92925,"url":"http://patchwork.ozlabs.org/api/1.0/people/92925/?format=json","name":"Aastha Rawat","email":"aastharawat@linux.microsoft.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260402-mshv_accel_arm64_supp-v2-1-754895c15e9e@linux.microsoft.com/mbox/","series":[{"id":498484,"url":"http://patchwork.ozlabs.org/api/1.0/series/498484/?format=json","date":"2026-04-02T12:52:39","name":"Add ARM64 support for MSHV accelerator","version":2,"mbox":"http://patchwork.ozlabs.org/series/498484/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2219145/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=linux.microsoft.com header.i=@linux.microsoft.com\n header.a=rsa-sha256 header.s=default header.b=WFDBKD8e;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=rsa-sha256; c=relaxed/relaxed; d=linux.microsoft.com;\n s=default; t=1775134378;\n bh=CCXg0h1LAMueZzd2AAFFLtrdzODm53KCE3V4EscmrYY=;\n h=From:Date:Subject:References:In-Reply-To:To:Cc:From;\n b=WFDBKD8ebYP3Dk0GsS4fzFARKVqrXNyZpOpHCmt5jS8KOfPRSyQr8n0dpjWNp0CEu\n xBV7UpYkGSXBvHiq1UIZ4EKItnJkvIqFkzsjMo863T8K0ZC8N1/lUEWVAhsA7pp7pG\n 8I/223WgYErxXCox+RObHcNgwtYG6AiPJsyRmwOY=","From":"Aastha Rawat ","Date":"Thu, 02 Apr 2026 12:52:28 +0000","Subject":"[PATCH v2 01/14] accel/mshv: move msr.c to target/i386","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"\n <20260402-mshv_accel_arm64_supp-v2-1-754895c15e9e@linux.microsoft.com>","References":"\n <20260402-mshv_accel_arm64_supp-v2-0-754895c15e9e@linux.microsoft.com>","In-Reply-To":"\n <20260402-mshv_accel_arm64_supp-v2-0-754895c15e9e@linux.microsoft.com>","To":"qemu-devel@nongnu.org","Cc":"Magnus Kulke ,\n Wei Liu , Paolo Bonzini ,\n\t=?utf-8?q?Marc-Andr=C3=A9_Lureau?= ,\n\t=?utf-8?q?Daniel_P=2E_Berrang=C3=A9?= , =?utf-8?q?Phil?=\n\t=?utf-8?q?ippe_Mathieu-Daud=C3=A9?= ,\n Peter Maydell ,\n Anirudh Rayabharam ,\n Aastha Rawat ,\n Magnus Kulke , qemu-arm@nongnu.org,\n Alexander Graf , Pedro Barbuda ,\n Mohamed Mediouni ","X-Mailer":"b4 0.15.1","Received-SPF":"pass client-ip=13.77.154.182;\n envelope-from=aastharawat@linux.microsoft.com; helo=linux.microsoft.com","X-Spam_score_int":"-42","X-Spam_score":"-4.3","X-Spam_bar":"----","X-Spam_report":"(-4.3 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, RCVD_IN_DNSWL_MED=-2.3,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"This file has x86 specific implementations. Move this file to i386\nfolder in preparation for ARM64 MSHV support.\n\nAcked-by: Wei Liu \nReviewed-by: Mohamed Mediouni \nSigned-off-by: Aastha Rawat \n---\n accel/mshv/meson.build | 1 -\n target/i386/mshv/meson.build | 1 +\n {accel => target/i386}/mshv/msr.c | 0\n 3 files changed, 1 insertion(+), 1 deletion(-)","diff":"diff --git a/accel/mshv/meson.build b/accel/mshv/meson.build\nindex c1b1787c5e..e433187cde 100644\n--- a/accel/mshv/meson.build\n+++ b/accel/mshv/meson.build\n@@ -1,6 +1,5 @@\n system_ss.add(when: 'CONFIG_MSHV', if_true: files(\n 'irq.c',\n 'mem.c',\n- 'msr.c',\n 'mshv-all.c'\n ))\ndiff --git a/target/i386/mshv/meson.build b/target/i386/mshv/meson.build\nindex 49f28d4a5b..6091c21887 100644\n--- a/target/i386/mshv/meson.build\n+++ b/target/i386/mshv/meson.build\n@@ -2,6 +2,7 @@ i386_mshv_ss = ss.source_set()\n \n i386_mshv_ss.add(files(\n 'mshv-cpu.c',\n+ 'msr.c',\n ))\n \n i386_system_ss.add_all(when: 'CONFIG_MSHV', if_true: i386_mshv_ss)\ndiff --git a/accel/mshv/msr.c b/target/i386/mshv/msr.c\nsimilarity index 100%\nrename from accel/mshv/msr.c\nrename to target/i386/mshv/msr.c\n","prefixes":["v2","01/14"]}