{"id":2198329,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2198329/?format=json","project":{"id":69,"url":"http://patchwork.ozlabs.org/api/1.0/projects/69/?format=json","name":"QEMU powerpc development","link_name":"qemu-ppc","list_id":"qemu-ppc.nongnu.org","list_email":"qemu-ppc@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260219191955.83815-29-philmd@linaro.org>","date":"2026-02-19T19:19:30","name":"[v2,28/50] target/riscv: Remove unnecessary target_ulong type uses","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"aa3d538e8410d196feb708580ee4d0176583f180","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/1.0/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-ppc/patch/20260219191955.83815-29-philmd@linaro.org/mbox/","series":[{"id":492714,"url":"http://patchwork.ozlabs.org/api/1.0/series/492714/?format=json","date":"2026-02-19T19:19:04","name":"gdbstub: Build once on various targets (single-binary)","version":2,"mbox":"http://patchwork.ozlabs.org/series/492714/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2198329/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=F4fyELqz;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::334;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x334.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-ppc@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-ppc-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Signed-off-by: Philippe Mathieu-Daudé \n---\n target/riscv/gdbstub.c | 8 ++++----\n 1 file changed, 4 insertions(+), 4 deletions(-)","diff":"diff --git a/target/riscv/gdbstub.c b/target/riscv/gdbstub.c\nindex f89b20ea84a..a053009ccd3 100644\n--- a/target/riscv/gdbstub.c\n+++ b/target/riscv/gdbstub.c\n@@ -52,7 +52,7 @@ int riscv_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n)\n RISCVCPUClass *mcc = RISCV_CPU_GET_CLASS(cs);\n RISCVCPU *cpu = RISCV_CPU(cs);\n CPURISCVState *env = &cpu->env;\n- target_ulong tmp;\n+ uint64_t tmp;\n \n if (n < 32) {\n tmp = env->gpr[n];\n@@ -80,7 +80,7 @@ int riscv_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)\n RISCVCPU *cpu = RISCV_CPU(cs);\n CPURISCVState *env = &cpu->env;\n int length = 0;\n- target_ulong tmp;\n+ uint64_t tmp;\n \n switch (mcc->def->misa_mxl_max) {\n case MXL_RV32:\n@@ -194,7 +194,7 @@ static int riscv_gdb_set_csr(CPUState *cs, uint8_t *mem_buf, int n)\n const unsigned regsz = riscv_cpu_is_32bit(cpu) ? 4 : 8;\n \n if (n < CSR_TABLE_SIZE) {\n- target_ulong val = ldn_p(mem_buf, regsz);\n+ uint64_t val = ldn_p(mem_buf, regsz);\n int result;\n \n result = riscv_csrrw_debug(env, n, NULL, val, -1);\n@@ -215,7 +215,7 @@ static int riscv_gdb_get_virtual(CPUState *cs, GByteArray *buf, int n)\n CPURISCVState *env = &cpu->env;\n \n /* Per RiscV debug spec v1.0.0 rc4 */\n- target_ulong vbit = (env->virt_enabled) ? BIT(2) : 0;\n+ uint32_t vbit = (env->virt_enabled) ? BIT(2) : 0;\n \n return gdb_get_regl(buf, env->priv | vbit);\n #endif\n","prefixes":["v2","28/50"]}