{"id":2198057,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2198057/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260219090103.33697-2-skolothumtho@nvidia.com>","date":"2026-02-19T09:00:59","name":"[v7,1/5] backends/iommufd: Introduce iommufd_backend_alloc_veventq","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a696a7c7a2021816d685c316bf491337686f7afa","submitter":{"id":91580,"url":"http://patchwork.ozlabs.org/api/1.0/people/91580/?format=json","name":"Shameer Kolothum","email":"skolothumtho@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260219090103.33697-2-skolothumtho@nvidia.com/mbox/","series":[{"id":492651,"url":"http://patchwork.ozlabs.org/api/1.0/series/492651/?format=json","date":"2026-02-19T09:01:03","name":"vEVENTQ support for accelerated SMMUv3 devices","version":7,"mbox":"http://patchwork.ozlabs.org/series/492651/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2198057/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=boDohBsU;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Ip=[216.228.117.161];\n Helo=[mail.nvidia.com]","X-MS-Exchange-CrossTenant-AuthSource":"\n SA2PEPF00003F61.namprd04.prod.outlook.com","X-MS-Exchange-CrossTenant-AuthAs":"Anonymous","X-MS-Exchange-CrossTenant-FromEntityHeader":"HybridOnPrem","X-MS-Exchange-Transport-CrossTenantHeadersStamped":"BN7PPFD3499E3E3","X-Spam_score_int":"-10","X-Spam_score":"-1.1","X-Spam_bar":"-","X-Spam_report":"(-1.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.043,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n FORGED_SPF_HELO=1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_PASS=-0.001,\n SPF_NONE=0.001 autolearn=no autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"From: Nicolin Chen \n\nAdd a new helper for IOMMU_VEVENTQ_ALLOC ioctl to allocate a virtual event\nqueue (vEVENTQ) for a vIOMMU object, and define struct IOMMUFDVeventq to\nrepresent the allocated vEVENTQ.\n\nSigned-off-by: Nicolin Chen \nReviewed-by: Eric Auger \nReviewed-by: Nicolin Chen \nTested-by: Nicolin Chen \nSigned-off-by: Shameer Kolothum \n---\n include/system/iommufd.h | 14 ++++++++++++++\n backends/iommufd.c | 31 +++++++++++++++++++++++++++++++\n backends/trace-events | 1 +\n 3 files changed, 46 insertions(+)","diff":"diff --git a/include/system/iommufd.h b/include/system/iommufd.h\nindex 80d72469a9..7062944fe6 100644\n--- a/include/system/iommufd.h\n+++ b/include/system/iommufd.h\n@@ -56,6 +56,15 @@ typedef struct IOMMUFDVdev {\n uint32_t virt_id; /* virtual device ID */\n } IOMMUFDVdev;\n \n+/* Virtual event queue interface for a vIOMMU */\n+typedef struct IOMMUFDVeventq {\n+ IOMMUFDViommu *viommu;\n+ uint32_t veventq_id;\n+ uint32_t veventq_fd;\n+ uint32_t last_event_seq; /* Sequence number of last processed event */\n+ bool event_start; /* True after first valid event; cleared on overflow */\n+} IOMMUFDVeventq;\n+\n bool iommufd_backend_connect(IOMMUFDBackend *be, Error **errp);\n void iommufd_backend_disconnect(IOMMUFDBackend *be);\n \n@@ -86,6 +95,11 @@ bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, uint32_t dev_id,\n uint32_t viommu_id, uint64_t virt_id,\n uint32_t *out_vdev_id, Error **errp);\n \n+bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id,\n+ uint32_t type, uint32_t depth,\n+ uint32_t *out_veventq_id,\n+ uint32_t *out_veventq_fd, Error **errp);\n+\n bool iommufd_backend_set_dirty_tracking(IOMMUFDBackend *be, uint32_t hwpt_id,\n bool start, Error **errp);\n bool iommufd_backend_get_dirty_bitmap(IOMMUFDBackend *be, uint32_t hwpt_id,\ndiff --git a/backends/iommufd.c b/backends/iommufd.c\nindex 13822df82f..acfab907c0 100644\n--- a/backends/iommufd.c\n+++ b/backends/iommufd.c\n@@ -504,6 +504,37 @@ bool iommufd_backend_alloc_vdev(IOMMUFDBackend *be, uint32_t dev_id,\n return true;\n }\n \n+bool iommufd_backend_alloc_veventq(IOMMUFDBackend *be, uint32_t viommu_id,\n+ uint32_t type, uint32_t depth,\n+ uint32_t *out_veventq_id,\n+ uint32_t *out_veventq_fd, Error **errp)\n+{\n+ int ret;\n+ struct iommu_veventq_alloc alloc_veventq = {\n+ .size = sizeof(alloc_veventq),\n+ .flags = 0,\n+ .type = type,\n+ .veventq_depth = depth,\n+ .viommu_id = viommu_id,\n+ };\n+\n+ ret = ioctl(be->fd, IOMMU_VEVENTQ_ALLOC, &alloc_veventq);\n+\n+ trace_iommufd_viommu_alloc_eventq(be->fd, viommu_id, type,\n+ alloc_veventq.out_veventq_id,\n+ alloc_veventq.out_veventq_fd, ret);\n+ if (ret) {\n+ error_setg_errno(errp, errno, \"IOMMU_VEVENTQ_ALLOC failed\");\n+ return false;\n+ }\n+\n+ g_assert(out_veventq_id);\n+ g_assert(out_veventq_fd);\n+ *out_veventq_id = alloc_veventq.out_veventq_id;\n+ *out_veventq_fd = alloc_veventq.out_veventq_fd;\n+ return true;\n+}\n+\n bool host_iommu_device_iommufd_attach_hwpt(HostIOMMUDeviceIOMMUFD *idev,\n uint32_t hwpt_id, Error **errp)\n {\ndiff --git a/backends/trace-events b/backends/trace-events\nindex 8dc64a20d3..b9365113e7 100644\n--- a/backends/trace-events\n+++ b/backends/trace-events\n@@ -23,6 +23,7 @@ iommufd_backend_get_dirty_bitmap(int iommufd, uint32_t hwpt_id, uint64_t iova, u\n iommufd_backend_invalidate_cache(int iommufd, uint32_t id, uint32_t data_type, uint32_t entry_len, uint32_t entry_num, uint32_t done_num, uint64_t data_ptr, int ret) \" iommufd=%d id=%u data_type=%u entry_len=%u entry_num=%u done_num=%u data_ptr=0x%\"PRIx64\" (%d)\"\n iommufd_backend_alloc_viommu(int iommufd, uint32_t dev_id, uint32_t type, uint32_t hwpt_id, uint32_t viommu_id, int ret) \" iommufd=%d type=%u dev_id=%u hwpt_id=%u viommu_id=%u (%d)\"\n iommufd_backend_alloc_vdev(int iommufd, uint32_t dev_id, uint32_t viommu_id, uint64_t virt_id, uint32_t vdev_id, int ret) \" iommufd=%d dev_id=%u viommu_id=%u virt_id=0x%\"PRIx64\" vdev_id=%u (%d)\"\n+iommufd_viommu_alloc_eventq(int iommufd, uint32_t viommu_id, uint32_t type, uint32_t veventq_id, uint32_t veventq_fd, int ret) \" iommufd=%d viommu_id=%u type=%u veventq_id=%u veventq_fd=%u (%d)\"\n \n # igvm-cfg.c\n igvm_reset_enter(int type) \"type=%u\"\n","prefixes":["v7","1/5"]}