{"id":2197510,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2197510/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260218015151.4052-9-graf@amazon.com>","date":"2026-02-18T01:51:48","name":"[08/10] hw/core/eif: Move definitions to header","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"a7c6aeae295081d27bbb0fbf16062881f54de1b9","submitter":{"id":76572,"url":"http://patchwork.ozlabs.org/api/1.0/people/76572/?format=json","name":"Alexander Graf","email":"graf@amazon.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260218015151.4052-9-graf@amazon.com/mbox/","series":[{"id":492503,"url":"http://patchwork.ozlabs.org/api/1.0/series/492503/?format=json","date":"2026-02-18T01:51:40","name":"Native Nitro Enclaves support","version":1,"mbox":"http://patchwork.ozlabs.org/series/492503/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2197510/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=amazon.com header.i=@amazon.com header.a=rsa-sha256\n header.s=amazoncorp2 header.b=UX5cU6Tg;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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a=rsa-sha256; c=relaxed/relaxed;\n d=amazon.com; i=@amazon.com; q=dns/txt; s=amazoncorp2;\n t=1771379589; x=1802915589;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=txAK976ulrDqiv5ZANEFUx5CISRFuFCg+v/SRZmWc98=;\n b=UX5cU6Tgc0ErvN/ZR74BqRTw93QESkyTXENKm+ylLUiPRYototq1WGwD\n 2JkAfua9uvXJzYhgh0s4rbxia8dewepQdrOb9tErpI2FcmS2nnYisuQcT\n OH1YEMUUrFa9lhyj8iAsMf6kfqaJdvHti7Hfmo1GkHjECwHSKCVkJ7bWD\n TEBefmc54fgQ4Pj1u746qd4BYn15kDyAiIfHSgiiXzR3hySyx4NkbIBqF\n kg7zBTC72Is6BrIkZffwZmBloOlgTCGhLTr9zF3opDGXNYWjKyGjfzH7e\n 6BvED03zFjED5B1DXGXQ0PJYcGsx8ltWm/wlWhk41SyLB1Y9DPYq9vVLo A==;","X-CSE-ConnectionGUID":"iYHG5GhqSDaRhs0neP8KRQ==","X-CSE-MsgGUID":"GZBGa8S1TPOtSK/S1+Rwjg==","X-IronPort-AV":"E=Sophos;i=\"6.21,297,1763424000\"; d=\"scan'208\";a=\"13259296\"","X-Farcaster-Flow-ID":"478f3760-1228-4186-a2be-98a433dc0f3a","From":"Alexander Graf ","To":"","CC":", Peter Maydell , \"Thomas\n Huth\" , , ,\n , , Cornelia Huck\n , , Dorjoy Chowdhury\n , Pierrick Bouvier ,\n Paolo Bonzini , Tyler Fanelli ,\n , ","Subject":"[PATCH 08/10] hw/core/eif: Move definitions to header","Date":"Wed, 18 Feb 2026 01:51:48 +0000","Message-ID":"<20260218015151.4052-9-graf@amazon.com>","X-Mailer":"git-send-email 2.47.1","In-Reply-To":"<20260218015151.4052-1-graf@amazon.com>","References":"<20260218015151.4052-1-graf@amazon.com>","MIME-Version":"1.0","X-Originating-IP":"[172.19.99.218]","X-ClientProxiedBy":"EX19D032UWA001.ant.amazon.com (10.13.139.62) To\n EX19D020UWC004.ant.amazon.com (10.13.138.149)","Content-Type":"text/plain; charset=\"us-ascii\"","Content-Transfer-Encoding":"7bit","Received-SPF":"pass client-ip=44.246.1.125;\n envelope-from=prvs=502105d20=graf@amazon.de;\n helo=pdx-out-002.esa.us-west-2.outbound.mail-perimeter.amazon.com","X-Spam_score_int":"-19","X-Spam_score":"-2.0","X-Spam_bar":"--","X-Spam_report":"(-2.0 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.043,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1,\n HEADER_FROM_DIFFERENT_DOMAINS=0.001, RCVD_IN_DNSWL_NONE=-0.0001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_NONE=0.001, T_SPF_PERMERROR=0.01,\n UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"In follow-up patches we need some EIF file definitions that are\ncurrently in the eif.c file, but want to access them from a separate\ndevice. Move them into the header instead.\n\nSigned-off-by: Alexander Graf \n---\n hw/core/eif.c | 38 --------------------------------------\n hw/core/eif.h | 38 ++++++++++++++++++++++++++++++++++++++\n 2 files changed, 38 insertions(+), 38 deletions(-)","diff":"diff --git a/hw/core/eif.c b/hw/core/eif.c\nindex 513caec6b4..96f1d76578 100644\n--- a/hw/core/eif.c\n+++ b/hw/core/eif.c\n@@ -18,44 +18,6 @@\n \n #include \"hw/core/eif.h\"\n \n-#define MAX_SECTIONS 32\n-\n-/* members are ordered according to field order in .eif file */\n-typedef struct EifHeader {\n- uint8_t magic[4]; /* must be .eif in ascii i.e., [46, 101, 105, 102] */\n- uint16_t version;\n- uint16_t flags;\n- uint64_t default_memory;\n- uint64_t default_cpus;\n- uint16_t reserved;\n- uint16_t section_cnt;\n- uint64_t section_offsets[MAX_SECTIONS];\n- uint64_t section_sizes[MAX_SECTIONS];\n- uint32_t unused;\n- uint32_t eif_crc32;\n-} QEMU_PACKED EifHeader;\n-\n-/* members are ordered according to field order in .eif file */\n-typedef struct EifSectionHeader {\n- /*\n- * 0 = invalid, 1 = kernel, 2 = cmdline, 3 = ramdisk, 4 = signature,\n- * 5 = metadata\n- */\n- uint16_t section_type;\n- uint16_t flags;\n- uint64_t section_size;\n-} QEMU_PACKED EifSectionHeader;\n-\n-enum EifSectionTypes {\n- EIF_SECTION_INVALID = 0,\n- EIF_SECTION_KERNEL = 1,\n- EIF_SECTION_CMDLINE = 2,\n- EIF_SECTION_RAMDISK = 3,\n- EIF_SECTION_SIGNATURE = 4,\n- EIF_SECTION_METADATA = 5,\n- EIF_SECTION_MAX = 6,\n-};\n-\n static const char *section_type_to_string(uint16_t type)\n {\n const char *str;\ndiff --git a/hw/core/eif.h b/hw/core/eif.h\nindex fed3cb5514..a3412377a9 100644\n--- a/hw/core/eif.h\n+++ b/hw/core/eif.h\n@@ -11,6 +11,44 @@\n #ifndef HW_CORE_EIF_H\n #define HW_CORE_EIF_H\n \n+#define MAX_SECTIONS 32\n+\n+/* members are ordered according to field order in .eif file */\n+typedef struct EifHeader {\n+ uint8_t magic[4]; /* must be .eif in ascii i.e., [46, 101, 105, 102] */\n+ uint16_t version;\n+ uint16_t flags;\n+ uint64_t default_memory;\n+ uint64_t default_cpus;\n+ uint16_t reserved;\n+ uint16_t section_cnt;\n+ uint64_t section_offsets[MAX_SECTIONS];\n+ uint64_t section_sizes[MAX_SECTIONS];\n+ uint32_t unused;\n+ uint32_t eif_crc32;\n+} QEMU_PACKED EifHeader;\n+\n+/* members are ordered according to field order in .eif file */\n+typedef struct EifSectionHeader {\n+ /*\n+ * 0 = invalid, 1 = kernel, 2 = cmdline, 3 = ramdisk, 4 = signature,\n+ * 5 = metadata\n+ */\n+ uint16_t section_type;\n+ uint16_t flags;\n+ uint64_t section_size;\n+} QEMU_PACKED EifSectionHeader;\n+\n+enum EifSectionTypes {\n+ EIF_SECTION_INVALID = 0,\n+ EIF_SECTION_KERNEL = 1,\n+ EIF_SECTION_CMDLINE = 2,\n+ EIF_SECTION_RAMDISK = 3,\n+ EIF_SECTION_SIGNATURE = 4,\n+ EIF_SECTION_METADATA = 5,\n+ EIF_SECTION_MAX = 6,\n+};\n+\n bool read_eif_file(const char *eif_path, const char *machine_initrd,\n char **kernel_path, char **initrd_path,\n char **kernel_cmdline, uint8_t *image_sha384,\n","prefixes":["08/10"]}