{"id":2197489,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2197489/?format=json","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.0/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260217-mtk-mt8189-clocks-v2-2-cd381cd05251@baylibre.com>","date":"2026-02-17T23:30:09","name":"[v2,2/7] clk: mediatek: refactor parent rate lookup functions","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"034b3ef412e185fd1a327bf5f0b890d478e54748","submitter":{"id":87228,"url":"http://patchwork.ozlabs.org/api/1.0/people/87228/?format=json","name":"David Lechner","email":"dlechner@baylibre.com"},"delegate":{"id":3651,"url":"http://patchwork.ozlabs.org/api/1.0/users/3651/?format=json","username":"trini","first_name":"Tom","last_name":"Rini","email":"trini@ti.com"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260217-mtk-mt8189-clocks-v2-2-cd381cd05251@baylibre.com/mbox/","series":[{"id":492497,"url":"http://patchwork.ozlabs.org/api/1.0/series/492497/?format=json","date":"2026-02-17T23:30:08","name":"clk: mediatek: new mt8189 driver","version":2,"mbox":"http://patchwork.ozlabs.org/series/492497/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2197489/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=baylibre-com.20230601.gappssmtp.com\n header.i=@baylibre-com.20230601.gappssmtp.com header.a=rsa-sha256\n header.s=20230601 header.b=G0DXBsTS;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=baylibre.com","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=baylibre-com.20230601.gappssmtp.com\n header.i=@baylibre-com.20230601.gappssmtp.com header.b=\"G0DXBsTS\";\n\tdkim-atps=neutral","phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=baylibre.com","phobos.denx.de;\n spf=pass smtp.mailfrom=dlechner@baylibre.com"],"Received":["from phobos.denx.de (unknown\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fFws248Xtz1xvq\n\tfor ; Wed, 18 Feb 2026 10:31:50 +1100 (AEDT)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 44FFF83D17;\n\tWed, 18 Feb 2026 00:31:19 +0100 (CET)","by phobos.denx.de (Postfix, from userid 109)\n id 1A44383DEB; Wed, 18 Feb 2026 00:31:18 +0100 (CET)","from mail-ot1-x333.google.com (mail-ot1-x333.google.com\n [IPv6:2607:f8b0:4864:20::333])\n (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 8BC1D83D0B\n for ; Wed, 18 Feb 2026 00:31:14 +0100 (CET)","by mail-ot1-x333.google.com with SMTP id\n 46e09a7af769-7d4c65d744cso2654590a34.3\n for ; Tue, 17 Feb 2026 15:31:14 -0800 (PST)","from [127.0.1.1] ([2600:8803:e7e4:500:b8c6:5b3:8109:1f08])\n by smtp.gmail.com with ESMTPSA id\n 46e09a7af769-7d4c7288d34sm11122198a34.18.2026.02.17.15.31.12\n (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n Tue, 17 Feb 2026 15:31:12 -0800 (PST)"],"X-Spam-Checker-Version":"SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de","X-Spam-Level":"","X-Spam-Status":"No, score=-1.9 required=5.0 tests=BAYES_00,DKIM_SIGNED,\n DKIM_VALID,RCVD_IN_DNSWL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=baylibre-com.20230601.gappssmtp.com; s=20230601; t=1771371073;\n x=1771975873;\n darn=lists.denx.de;\n h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n :mime-version:subject:date:from:from:to:cc:subject:date:message-id\n :reply-to; bh=dok5TCZOOR1yRJocpiTUyQPxUVA6UawHSqoybTggNh8=;\n b=G0DXBsTS69WsZJUuCW/E9WRk6fA641jRNR4MbL3VWcFIB+Vx8dK4tXMWNj+q1HTM8v\n 4AOZRhnUnaaB7yTiWaFN5t71ZyMywVUD2UdYY7Tw6BPNEc3hX4jCUrBXwcEZIPe11q+N\n 6GMCgK1UOrpyRJag+Drxp5DFvHduqx0kvnnWbYO+tdL4PWE6AF/Apbqj1ge2U969dPtH\n Fzsv8ELgYHzaBHLzXf91YsrBkq+iW9O/eKa6b5fxcjmTesSqefSoCHHRe/53S+U3z+d5\n ZXEHK+ng1POMPS6uyBtrA5GIBrbfz6YFiepI4RHxXn0GOLNM7tDfQpcjeGq/UmTwuw6h\n ifrw==","X-Google-DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=1e100.net; s=20230601; t=1771371073; x=1771975873;\n h=cc:to:in-reply-to:references:message-id:content-transfer-encoding\n :mime-version:subject:date:from:x-gm-gg:x-gm-message-state:from:to\n :cc:subject:date:message-id:reply-to;\n bh=dok5TCZOOR1yRJocpiTUyQPxUVA6UawHSqoybTggNh8=;\n b=ZDjpeXsejHtnlePl72IcYZSVACbT0vsG18OCYqJLXoksV9Oga5/W2lWpDCjPM7C/UR\n tn1/Zoh7sIKjB1EkSbT1HLTclvoqC7bwqpS7TrTNge79dYUUFiUvLgedzQi1k71Zju3V\n Upgy1wdzksISlwHXPJcL2xDhyPuLZm8kx44LO7FmalTJ5vciHlKYeq2hTHh3qybyBvYA\n kj+makgWBV7p8IdZnl40IFjNElVAiM3hwswHcErJwHbeX7zTX19znIqNzKe4M8QUZPeX\n 6J5AHkQIB23D+/XtoxfNR1oEU1e9mxyXxcH/7JP67hVdaUqo+2MCQSN2Kha7/4VLk2ll\n k6xQ==","X-Forwarded-Encrypted":"i=1;\n AJvYcCW0ShXvFzhdAU9bkr0cbqXZEgiDSKYRCmj5wZfYKQVwvNehUuVT9nOZsRGuz63XumLGLvzmtZQ=@lists.denx.de","X-Gm-Message-State":"AOJu0YwEW9qQ0xFduIbiSXWcru3OI74FOc94keewB2S/2XFMqlYYuMnK\n hkWgGWx9MwNDWJPQntjh2Z02YR1iECmMFl1kEYnK6i9SckDNBktnaJSaVBXiiKSjI3Y=","X-Gm-Gg":"AZuq6aLDnQYKa0jfEkP8bkMN02DMVqE0Si+Bb1+10cY1PLJt9nVrD8MiZVNd4KPDnKZ\n IZTFHdq60rOBLbwlp+lbwd8q99R+/1XGO/1OI9w3u39uohe5AiDSnO+nns7EWd10lYLAhTELTWN\n q+qPJI5rKyYvtJ3aYMUOqoB8sHYMSO2mJEc+t4pvIz/y4+S2nAOmqcyZjEpq10LKjfCBBQPkT+x\n h27koEwTO9zf2P55z27YUX3mzvP8xUvganhh+bVzxRR7af+S/ftVrgX928x7t/p7RC2k6R/yzBa\n DeFqlzYXxyEj2ILfuD3H8ZMNdukQEGWLsERVMZuhN45hWIneZN1zGjoIYGlCvIpoKTo3NsGTFOa\n qrkrl++n4awT4KpA09rD4qMTLwhT0pYp3P1HAjwn/TA8MuMEPJJa34GVl6bFRvFW9LS/35M7NhF\n b+8EInUJ8GlO86+al8EZTHxa+MNw==","X-Received":"by 2002:a05:6830:91f:b0:7d4:4af4:b7d4 with SMTP id\n 46e09a7af769-7d505db4360mr150907a34.1.1771371073269;\n Tue, 17 Feb 2026 15:31:13 -0800 (PST)","From":"David Lechner ","Date":"Tue, 17 Feb 2026 17:30:09 -0600","Subject":"[PATCH v2 2/7] clk: mediatek: refactor parent rate lookup\n functions","MIME-Version":"1.0","Content-Type":"text/plain; charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260217-mtk-mt8189-clocks-v2-2-cd381cd05251@baylibre.com>","References":"<20260217-mtk-mt8189-clocks-v2-0-cd381cd05251@baylibre.com>","In-Reply-To":"<20260217-mtk-mt8189-clocks-v2-0-cd381cd05251@baylibre.com>","To":"Lukasz Majewski , Ryder Lee ,\n Weijie Gao ,\n Chunfeng Yun ,\n Igor Belwon ,\n GSS_MTK_Uboot_upstream ,\n Tom Rini ","Cc":"Julien Stephan , u-boot@lists.denx.de,\n David Lechner ","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=openpgp-sha256; l=5541; i=dlechner@baylibre.com;\n h=from:subject:message-id;\n bh=8YFbB2CqM29lMFcwxaeZ41UGNY6AER3aHdzGWe9GU0k=;\n b=owEBhAF7/pANAwAKAcLMIAH/AY/AAcsmYgBplPoWmGZhppGepHw/NzxS8DgSai7OufXR1wnUb\n nrOutSG+tCJAUoEAAEKADQWIQTsGNmeYg6D1pzYaJjCzCAB/wGPwAUCaZT6FhYcZGxlY2huZXJA\n YmF5bGlicmUuY29tAAoJEMLMIAH/AY/AqqEH/2pKV2ACQGWoaeXHjOfZO4ymZqK4iZew3jeSVGm\n OnOrgHBC5uLfIxcrpQ9ONw23e23GkqEFMiBacSrTc/a2Ki4wC3s5uTwPFbzwIpol7BC/skYj75k\n jPkBjkG64sb4/SnOdmQVBEdxly2gCPByvRygUHCkaR8vjp3GGjdtvKw2GRyMS7aPhDmy78tce1J\n H8IW6oGOBkEOcCaju/ZHhd3bM7a7iCMGKVfyb3R5J1MOzjaLwdtlFDCe9ixmZ0TQjnXITw+5GXk\n T5we+NQP5FlN2qC50wW85vWWDr50SDBu6lLscLq4nki2WaKWRfqpFoovEyHAbP9QafrA3UZIZDO\n f3NY=","X-Developer-Key":"i=dlechner@baylibre.com; a=openpgp;\n fpr=8A73D82A6A1F509907F373881F8AF88C82F77C03","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"Refactor duplicate parent rate lookup code into a common function.\n\nInstead of relying on rules like X is always the parent of Y, we use\nthe driver ops pointer to make sure we are actually getting the correct\nparent clock device. This allows the same function to be called from\ndifferent clock types and will allow future chip-specific clock drivers\nto not have to follow the rules as strictly.\n\nSigned-off-by: David Lechner \n---\n drivers/clk/mediatek/clk-mtk.c | 111 +++++++++++++++++++----------------------\n 1 file changed, 51 insertions(+), 60 deletions(-)","diff":"diff --git a/drivers/clk/mediatek/clk-mtk.c b/drivers/clk/mediatek/clk-mtk.c\nindex b3f05bf5a21..0123b0ce7b1 100644\n--- a/drivers/clk/mediatek/clk-mtk.c\n+++ b/drivers/clk/mediatek/clk-mtk.c\n@@ -168,6 +168,53 @@ static ulong mtk_clk_find_parent_rate(struct clk *clk, int id,\n \treturn clk_get_rate(&parent);\n }\n \n+const struct clk_ops mtk_clk_apmixedsys_ops;\n+const struct clk_ops mtk_clk_topckgen_ops;\n+const struct clk_ops mtk_clk_infrasys_ops;\n+\n+static ulong mtk_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk,\n+\t\t\t\t const int parent, u16 flags)\n+{\n+\tstruct udevice *parent_dev;\n+\n+\tswitch (flags & CLK_PARENT_MASK) {\n+\tcase CLK_PARENT_APMIXED:\n+\t\t/* APMIXEDSYS can be parent or grandparent. */\n+\t\tif (dev_get_driver_ops(clk->dev) == &mtk_clk_apmixedsys_ops)\n+\t\t\tparent_dev = clk->dev;\n+\t\telse if (dev_get_driver_ops(priv->parent) == &mtk_clk_apmixedsys_ops)\n+\t\t\tparent_dev = priv->parent;\n+\t\telse if (dev_get_driver_ops(dev_get_parent(priv->parent)) == &mtk_clk_apmixedsys_ops)\n+\t\t\tparent_dev = dev_get_parent(priv->parent);\n+\t\telse\n+\t\t\treturn -EINVAL;\n+\n+\t\tbreak;\n+\tcase CLK_PARENT_TOPCKGEN:\n+\t\tif (dev_get_driver_ops(clk->dev) == &mtk_clk_topckgen_ops)\n+\t\t\tparent_dev = clk->dev;\n+\t\telse if (dev_get_driver_ops(priv->parent) == &mtk_clk_topckgen_ops)\n+\t\t\tparent_dev = priv->parent;\n+\t\telse\n+\t\t\treturn -EINVAL;\n+\n+\t\tbreak;\n+\tcase CLK_PARENT_INFRASYS:\n+\t\tif (dev_get_driver_ops(clk->dev) != &mtk_clk_infrasys_ops)\n+\t\t\treturn -EINVAL;\n+\n+\t\tparent_dev = clk->dev;\n+\t\tbreak;\n+\tcase CLK_PARENT_XTAL:\n+\t\treturn priv->tree->xtal_rate;\n+\tdefault:\n+\t\tparent_dev = NULL;\n+\t\tbreak;\n+\t}\n+\n+\treturn mtk_clk_find_parent_rate(clk, parent, parent_dev);\n+}\n+\n static int mtk_clk_mux_set_parent(void __iomem *base, u32 parent,\n \t\t\t\t u32 parent_type,\n \t\t\t\t const struct mtk_composite *mux)\n@@ -637,39 +684,13 @@ static ulong mtk_topckgen_get_factor_rate(struct clk *clk, u32 off)\n \tconst struct mtk_fixed_factor *fdiv = &priv->tree->fdivs[off];\n \tulong rate;\n \n-\tswitch (fdiv->flags & CLK_PARENT_MASK) {\n-\tcase CLK_PARENT_APMIXED:\n-\t\trate = mtk_clk_find_parent_rate(clk, fdiv->parent,\n-\t\t\t\t\t\tpriv->parent);\n-\t\tbreak;\n-\tcase CLK_PARENT_TOPCKGEN:\n-\t\trate = mtk_clk_find_parent_rate(clk, fdiv->parent, NULL);\n-\t\tbreak;\n-\n-\tcase CLK_PARENT_XTAL:\n-\tdefault:\n-\t\trate = priv->tree->xtal_rate;\n-\t}\n-\n+\trate = mtk_find_parent_rate(priv, clk, fdiv->parent, fdiv->flags);\n \tif (IS_ERR_VALUE(rate))\n \t\treturn rate;\n \n \treturn mtk_factor_recalc_rate(fdiv, rate);\n }\n \n-static ulong mtk_topckgen_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk,\n-\t\t\t\t\t const int parent, u16 flags)\n-{\n-\tswitch (flags & CLK_PARENT_MASK) {\n-\tcase CLK_PARENT_XTAL:\n-\t\treturn priv->tree->xtal_rate;\n-\tcase CLK_PARENT_APMIXED:\n-\t\treturn mtk_clk_find_parent_rate(clk, parent, priv->parent);\n-\tdefault:\n-\t\treturn mtk_clk_find_parent_rate(clk, parent, NULL);\n-\t}\n-}\n-\n static ulong mtk_topckgen_get_mux_rate(struct clk *clk, u32 off)\n {\n \tstruct mtk_clk_priv *priv = dev_get_priv(clk->dev);\n@@ -687,33 +708,14 @@ static ulong mtk_topckgen_get_mux_rate(struct clk *clk, u32 off)\n \tif (mux->flags & CLK_PARENT_MIXED) {\n \t\tconst struct mtk_parent *parent = &mux->parent_flags[index];\n \n-\t\treturn mtk_topckgen_find_parent_rate(priv, clk, parent->id,\n-\t\t\t\t\t\t parent->flags);\n+\t\treturn mtk_find_parent_rate(priv, clk, parent->id, parent->flags);\n \t}\n \n \tif (mux->parent[index] == CLK_XTAL &&\n \t !(priv->tree->flags & CLK_BYPASS_XTAL))\n \t\treturn priv->tree->xtal_rate;\n \n-\treturn mtk_topckgen_find_parent_rate(priv, clk, mux->parent[index],\n-\t\t\t\t\t mux->flags);\n-}\n-\n-static ulong mtk_find_parent_rate(struct mtk_clk_priv *priv, struct clk *clk,\n-\t\t\t\t const int parent, u16 flags)\n-{\n-\tswitch (flags & CLK_PARENT_MASK) {\n-\tcase CLK_PARENT_XTAL:\n-\t\treturn priv->tree->xtal_rate;\n-\t/* Assume the second level parent is always APMIXED */\n-\tcase CLK_PARENT_APMIXED:\n-\t\tpriv = dev_get_priv(priv->parent);\n-\t\tfallthrough;\n-\tcase CLK_PARENT_TOPCKGEN:\n-\t\treturn mtk_clk_find_parent_rate(clk, parent, priv->parent);\n-\tdefault:\n-\t\treturn mtk_clk_find_parent_rate(clk, parent, NULL);\n-\t}\n+\treturn mtk_find_parent_rate(priv, clk, mux->parent[index], mux->flags);\n }\n \n static ulong mtk_topckgen_get_rate(struct clk *clk)\n@@ -963,18 +965,7 @@ static ulong mtk_infrasys_get_factor_rate(struct clk *clk, u32 off)\n \tconst struct mtk_fixed_factor *fdiv = &priv->tree->fdivs[off];\n \tulong rate;\n \n-\tswitch (fdiv->flags & CLK_PARENT_MASK) {\n-\tcase CLK_PARENT_TOPCKGEN:\n-\t\trate = mtk_clk_find_parent_rate(clk, fdiv->parent,\n-\t\t\t\t\t\tpriv->parent);\n-\t\tbreak;\n-\tcase CLK_PARENT_XTAL:\n-\t\trate = priv->tree->xtal_rate;\n-\t\tbreak;\n-\tdefault:\n-\t\trate = mtk_clk_find_parent_rate(clk, fdiv->parent, NULL);\n-\t}\n-\n+\trate = mtk_find_parent_rate(priv, clk, fdiv->parent, fdiv->flags);\n \tif (IS_ERR_VALUE(rate))\n \t\treturn rate;\n \n","prefixes":["v2","2/7"]}