{"id":2197399,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2197399/?format=json","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/1.0/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260217212707.2450423-16-cassel@kernel.org>","date":"2026-02-17T21:27:11","name":"[5/9] PCI: dwc: Replace BAR_RESERVED with BAR_DISABLED in glue drivers","commit_ref":null,"pull_url":null,"state":"handled-elsewhere","archived":false,"hash":"e9489be7a16338630b56a3b240936916cd0dffa0","submitter":{"id":87751,"url":"http://patchwork.ozlabs.org/api/1.0/people/87751/?format=json","name":"Niklas Cassel","email":"cassel@kernel.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260217212707.2450423-16-cassel@kernel.org/mbox/","series":[{"id":492480,"url":"http://patchwork.ozlabs.org/api/1.0/series/492480/?format=json","date":"2026-02-17T21:27:06","name":"PCI: endpoint differentiate between disabled and reserved BARs","version":1,"mbox":"http://patchwork.ozlabs.org/series/492480/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2197399/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=dFAPruJ7;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n 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c=relaxed/simple;\n\tbh=DLNJ6thciQ1FKfVLXLBIkij44la3XwigLb80Cl2oDMM=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=YnQGVYxfRs849f8qhJbX1ffv+CAUJlND1hhLu3rlrOlFaF+oQSz0ZiazbEh7uafAbIzEN2hU/xGd2B2Dylh2t6Wzk5w1Y6ZBk3rSsdcRWIwf95xEu2Z53E96iAGJaBNQZ6DHlwU0BH2x14UUGhspQbENuIxEq8kXgjafmqlHI8I=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=dFAPruJ7; arc=none smtp.client-ip=10.30.226.201","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1771363681;\n\tbh=DLNJ6thciQ1FKfVLXLBIkij44la3XwigLb80Cl2oDMM=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=dFAPruJ7oNmB/6OQ2buMqtV2VMS9EVMtiTfMkhszpe1fAfZXUoCT9eLz0e2a4qtd2\n\t SmaahcBBn74i2BHuv+RpTlb4Okud8413t0Y1CfJ6g+CUNG7nO1bawQekMUSdSLlAhP\n\t BNIZxANMEfkRq+OidscQlDaHXTsGqlN1IjKa0YoePQElNH8pPYRyy1UPID+ud1FC/8\n\t 9iCHg/2yCGtzLvGDj9RIIAPrZSyHGDw38gAHXMOdd5dsn94JyfO9/LPfr7OeJ+XxMD\n\t zTWEt/iw0XvgHJvDC/xi8AE41mPAv5F6USPv04JG6Z6mgLAwzCd2IKkOYPGJ6t/VVU\n\t YOOUSmCHFLLpg==","From":"Niklas Cassel ","To":"Richard Zhu , Lucas Stach ,\n Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= ,\n Manivannan Sadhasivam , Rob Herring ,\n Bjorn Helgaas , Frank Li ,\n Sascha Hauer ,\n Pengutronix Kernel Team ,\n Fabio Estevam ,\n Marek Vasut ,\n Yoshihiro Shimoda ,\n Geert Uytterhoeven ,\n Magnus Damm ,\n Thierry Reding ,\n Jonathan Hunter ,\n Kunihiko Hayashi ,\n Masami Hiramatsu ","Cc":"Manikanta Maddireddy ,\n\tKoichiro Den ,\n\tDamien Le Moal ,\n\tNiklas Cassel ,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\timx@lists.linux.dev,\n\tlinux-renesas-soc@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org","Subject":"[PATCH 5/9] PCI: dwc: Replace BAR_RESERVED with BAR_DISABLED in glue\n drivers","Date":"Tue, 17 Feb 2026 22:27:11 +0100","Message-ID":"<20260217212707.2450423-16-cassel@kernel.org>","X-Mailer":"git-send-email 2.53.0","In-Reply-To":"<20260217212707.2450423-11-cassel@kernel.org>","References":"<20260217212707.2450423-11-cassel@kernel.org>","Precedence":"bulk","X-Mailing-List":"linux-tegra@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","X-Developer-Signature":"v=1; a=openpgp-sha256; l=4691; i=cassel@kernel.org;\n h=from:subject; bh=DLNJ6thciQ1FKfVLXLBIkij44la3XwigLb80Cl2oDMM=;\n b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGDKn3NX7eofZL7l0boT87F2/nh3pD4+584evSZ7tm97N1\n 4Zrf7O+6ChlYRDjYpAVU2Tx/eGyv7jbfcpxxTs2MHNYmUCGMHBxCsBE5G8w/M/7lBqTn/vUik+u\n 87b5OW2efJFlp5dvk2nZ7cF6INMw/g4jww6Xu419J9mSrokUP75pFvxIVW2FfN0hF9Xnxzk55qV\n VMgAA","X-Developer-Key":"i=cassel@kernel.org; a=openpgp;\n fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA","Content-Transfer-Encoding":"8bit"},"content":"Most DWC based EPC glue drivers that have BARs marked as BAR_RESERVED in\nepc_features also call dw_pcie_ep_reset_bar() for these reserved BARs in\nep->ops->init().\n\nAn EPF driver will be able to get/enable BARs that have been disabled/reset\nunless they are marked as BAR_RESERVED (see pci_epc_get_next_free_bar()).\n\nThus all EPC drivers that have a BAR marked as BAR_RESERVED in epc_features\nAND call dw_pcie_ep_reset_bar() should really be marked as BAR_DISABLED.\n\nBARs that are marked as BAR_RESERVED in epc_features but for which\ndw_pcie_ep_reset_bar() is not called in ep->ops->init() are still kept as\nBAR_RESERVED.\n\nNo EPC drivers outside drivers/pci/controllers/dwc mark their BARs as\nBAR_RESERVED, so there is nothing to do in non-DWC based EPC drivers.\n\nSigned-off-by: Niklas Cassel \n---\n drivers/pci/controller/dwc/pci-imx6.c | 12 ++++++------\n drivers/pci/controller/dwc/pcie-rcar-gen4.c | 6 +++---\n drivers/pci/controller/dwc/pcie-tegra194.c | 8 ++++----\n drivers/pci/controller/dwc/pcie-uniphier-ep.c | 4 ++--\n 4 files changed, 15 insertions(+), 15 deletions(-)","diff":"diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c\nindex a5b8d0b71677..ec1e3557ca53 100644\n--- a/drivers/pci/controller/dwc/pci-imx6.c\n+++ b/drivers/pci/controller/dwc/pci-imx6.c\n@@ -1433,19 +1433,19 @@ static int imx_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,\n static const struct pci_epc_features imx8m_pcie_epc_features = {\n \tDWC_EPC_COMMON_FEATURES,\n \t.msi_capable = true,\n-\t.bar[BAR_1] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_3] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_1] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_3] = { .type = BAR_DISABLED, },\n \t.bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = SZ_256, },\n-\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t.align = SZ_64K,\n };\n \n static const struct pci_epc_features imx8q_pcie_epc_features = {\n \tDWC_EPC_COMMON_FEATURES,\n \t.msi_capable = true,\n-\t.bar[BAR_1] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_3] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_1] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_3] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t.align = SZ_64K,\n };\n \ndiff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c\nindex a6912e85e4dd..9dd05bac22b9 100644\n--- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c\n+++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c\n@@ -422,10 +422,10 @@ static int rcar_gen4_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,\n static const struct pci_epc_features rcar_gen4_pcie_epc_features = {\n \tDWC_EPC_COMMON_FEATURES,\n \t.msi_capable = true,\n-\t.bar[BAR_1] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_3] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_1] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_3] = { .type = BAR_DISABLED, },\n \t.bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = 256 },\n-\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t.align = SZ_1M,\n };\n \ndiff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c\nindex 31aa9a494dbc..9f9453e8cd23 100644\n--- a/drivers/pci/controller/dwc/pcie-tegra194.c\n+++ b/drivers/pci/controller/dwc/pcie-tegra194.c\n@@ -1994,10 +1994,10 @@ static const struct pci_epc_features tegra_pcie_epc_features = {\n \t.bar[BAR_0] = { .type = BAR_FIXED, .fixed_size = SZ_1M,\n \t\t\t.only_64bit = true, },\n \t.bar[BAR_1] = { .type = BAR_64BIT_UPPER, },\n-\t.bar[BAR_2] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_3] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_4] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_2] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_3] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_4] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t.align = SZ_64K,\n };\n \ndiff --git a/drivers/pci/controller/dwc/pcie-uniphier-ep.c b/drivers/pci/controller/dwc/pcie-uniphier-ep.c\nindex f873a1659592..5bde3ee682b5 100644\n--- a/drivers/pci/controller/dwc/pcie-uniphier-ep.c\n+++ b/drivers/pci/controller/dwc/pcie-uniphier-ep.c\n@@ -429,8 +429,8 @@ static const struct uniphier_pcie_ep_soc_data uniphier_pro5_data = {\n \t\t.bar[BAR_1] = { .type = BAR_64BIT_UPPER, },\n \t\t.bar[BAR_2] = { .only_64bit = true, },\n \t\t.bar[BAR_3] = { .type = BAR_64BIT_UPPER, },\n-\t\t.bar[BAR_4] = { .type = BAR_RESERVED, },\n-\t\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t\t.bar[BAR_4] = { .type = BAR_DISABLED, },\n+\t\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t},\n };\n \n","prefixes":["5/9"]}