{"id":2197352,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2197352/?format=json","project":{"id":21,"url":"http://patchwork.ozlabs.org/api/1.0/projects/21/?format=json","name":"Linux Tegra Development","link_name":"linux-tegra","list_id":"linux-tegra.vger.kernel.org","list_email":"linux-tegra@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260217173457.18628-9-akhilrajeev@nvidia.com>","date":"2026-02-17T17:34:57","name":"[8/8] arm64: tegra: Add iommu-map and enable GPCDMA in Tegra264","commit_ref":null,"pull_url":null,"state":"superseded","archived":false,"hash":"4b9fff7346b96708304fa518038203bc55df9500","submitter":{"id":81965,"url":"http://patchwork.ozlabs.org/api/1.0/people/81965/?format=json","name":"Akhil R","email":"akhilrajeev@nvidia.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-tegra/patch/20260217173457.18628-9-akhilrajeev@nvidia.com/mbox/","series":[{"id":492464,"url":"http://patchwork.ozlabs.org/api/1.0/series/492464/?format=json","date":"2026-02-17T17:34:49","name":"Add GPCDMA support in Tegra264","version":1,"mbox":"http://patchwork.ozlabs.org/series/492464/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2197352/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-tegra@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=iI45BF76;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; 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Also enable GPCDMA for Tegra264.\n\nSigned-off-by: Akhil R \n---\n .../arm64/boot/dts/nvidia/tegra264-p3834.dtsi | 4 +++\n arch/arm64/boot/dts/nvidia/tegra264.dtsi | 33 ++++++++++++++++++-\n 2 files changed, 36 insertions(+), 1 deletion(-)","diff":"diff --git a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi\nindex 7e2c3e66c2ab..c8beb616964a 100644\n--- a/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi\n+++ b/arch/arm64/boot/dts/nvidia/tegra264-p3834.dtsi\n@@ -16,6 +16,10 @@ serial@c4e0000 {\n \t\tserial@c5a0000 {\n \t\t\tstatus = \"okay\";\n \t\t};\n+\n+\t\tdma-controller@8400000 {\n+\t\t\tstatus = \"okay\";\n+\t\t};\n \t};\n \n \tbus@8100000000 {\ndiff --git a/arch/arm64/boot/dts/nvidia/tegra264.dtsi b/arch/arm64/boot/dts/nvidia/tegra264.dtsi\nindex 7644a41d5f72..0317418c95d3 100644\n--- a/arch/arm64/boot/dts/nvidia/tegra264.dtsi\n+++ b/arch/arm64/boot/dts/nvidia/tegra264.dtsi\n@@ -3243,7 +3243,38 @@ gpcdma: dma-controller@8400000 {\n \t\t\t\t ,\n \t\t\t\t ;\n \t\t\t#dma-cells = <1>;\n-\t\t\tiommus = <&smmu1 0x00000800>;\n+\t\t\tiommu-map =\n+\t\t\t\t<1 &smmu1 0x801 1>,\n+\t\t\t\t<2 &smmu1 0x802 1>,\n+\t\t\t\t<3 &smmu1 0x803 1>,\n+\t\t\t\t<4 &smmu1 0x804 1>,\n+\t\t\t\t<5 &smmu1 0x805 1>,\n+\t\t\t\t<6 &smmu1 0x806 1>,\n+\t\t\t\t<7 &smmu1 0x807 1>,\n+\t\t\t\t<8 &smmu1 0x808 1>,\n+\t\t\t\t<9 &smmu1 0x809 1>,\n+\t\t\t\t<10 &smmu1 0x80a 1>,\n+\t\t\t\t<11 &smmu1 0x80b 1>,\n+\t\t\t\t<12 &smmu1 0x80c 1>,\n+\t\t\t\t<13 &smmu1 0x80d 1>,\n+\t\t\t\t<14 &smmu1 0x80e 1>,\n+\t\t\t\t<15 &smmu1 0x80f 1>,\n+\t\t\t\t<16 &smmu1 0x810 1>,\n+\t\t\t\t<17 &smmu1 0x811 1>,\n+\t\t\t\t<18 &smmu1 0x812 1>,\n+\t\t\t\t<19 &smmu1 0x813 1>,\n+\t\t\t\t<20 &smmu1 0x814 1>,\n+\t\t\t\t<21 &smmu1 0x815 1>,\n+\t\t\t\t<22 &smmu1 0x816 1>,\n+\t\t\t\t<23 &smmu1 0x817 1>,\n+\t\t\t\t<24 &smmu1 0x818 1>,\n+\t\t\t\t<25 &smmu1 0x819 1>,\n+\t\t\t\t<26 &smmu1 0x81a 1>,\n+\t\t\t\t<27 &smmu1 0x81b 1>,\n+\t\t\t\t<28 &smmu1 0x81c 1>,\n+\t\t\t\t<29 &smmu1 0x81d 1>,\n+\t\t\t\t<30 &smmu1 0x81e 1>,\n+\t\t\t\t<31 &smmu1 0x81f 1>;\n \t\t\tdma-coherent;\n \t\t\tdma-channel-mask = <0xfffffffe>;\n \t\t\tstatus = \"disabled\";\n","prefixes":["8/8"]}