{"id":2197135,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2197135/?format=json","project":{"id":28,"url":"http://patchwork.ozlabs.org/api/1.0/projects/28/?format=json","name":"Linux PCI development","link_name":"linux-pci","list_id":"linux-pci.vger.kernel.org","list_email":"linux-pci@vger.kernel.org","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260217080102.206581-8-sunlightlinux@gmail.com>","date":"2026-02-17T08:01:02","name":"[RFC,3/3] PCI: Update bandwidth control and thermal cooling for Gen 7 (128 GT/s)","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"81ada3cbaa551537ba4904b7b976cf08aed32912","submitter":{"id":92653,"url":"http://patchwork.ozlabs.org/api/1.0/people/92653/?format=json","name":"Ionut Nechita (Sunlight Linux)","email":"sunlightlinux@gmail.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-pci/patch/20260217080102.206581-8-sunlightlinux@gmail.com/mbox/","series":[{"id":492389,"url":"http://patchwork.ozlabs.org/api/1.0/series/492389/?format=json","date":"2026-02-17T08:00:56","name":"PCI: Add PCIe Gen 7 (128 GT/s) speed support","version":1,"mbox":"http://patchwork.ozlabs.org/series/492389/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2197135/checks/","tags":{},"headers":{"Return-Path":"\n ","X-Original-To":["incoming@patchwork.ozlabs.org","linux-pci@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=EXR/Z1rL;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; 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Wysocki\" ,\n Daniel Lezcano ","Cc":"Zhang Rui ,\n\tLukasz Luba ,\n\tLukas Wunner ,\n\tIonut Nechita ,\n\tlinux-pci@vger.kernel.org,\n\tlinux-pm@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tIonut Nechita ","Subject":"[RFC PATCH 3/3] PCI: Update bandwidth control and thermal cooling for\n Gen 7 (128 GT/s)","Date":"Tue, 17 Feb 2026 10:01:02 +0200","Message-ID":"<20260217080102.206581-8-sunlightlinux@gmail.com>","X-Mailer":"git-send-email 2.53.0","In-Reply-To":"<20260217080102.206581-2-sunlightlinux@gmail.com>","References":"<20260217080102.206581-2-sunlightlinux@gmail.com>","Precedence":"bulk","X-Mailing-List":"linux-pci@vger.kernel.org","List-Id":"","List-Subscribe":"","List-Unsubscribe":"","MIME-Version":"1.0","Content-Type":"text/plain; charset=UTF-8","Content-Transfer-Encoding":"8bit"},"content":"From: Ionut Nechita \n\nUpdate PCIe subsystem components to support 128 GT/s link speed:\n\n - bwctrl: Extend pcie_valid_speed() range to PCIE_SPEED_128_0GT,\n add PCIE_SPEED_128_0GT to speed conversion table, widen\n supported_speeds variables from u8 to u16\n - portdrv: Switch hweight8() to hweight16() for supported_speeds\n to match the widened type\n - pcie_cooling: Add static_assert for PCIE_SPEED_128_0GT enum\n contiguity check\n\nSigned-off-by: Ionut Nechita \n---\n drivers/pci/pcie/bwctrl.c | 7 ++++---\n drivers/pci/pcie/portdrv.c | 2 +-\n drivers/thermal/pcie_cooling.c | 1 +\n 3 files changed, 6 insertions(+), 4 deletions(-)","diff":"diff --git a/drivers/pci/pcie/bwctrl.c b/drivers/pci/pcie/bwctrl.c\nindex 36f939f23d34e..b9125b40cb860 100644\n--- a/drivers/pci/pcie/bwctrl.c\n+++ b/drivers/pci/pcie/bwctrl.c\n@@ -50,7 +50,7 @@ static DECLARE_RWSEM(pcie_bwctrl_setspeed_rwsem);\n \n static bool pcie_valid_speed(enum pci_bus_speed speed)\n {\n-\treturn (speed >= PCIE_SPEED_2_5GT) && (speed <= PCIE_SPEED_64_0GT);\n+\treturn (speed >= PCIE_SPEED_2_5GT) && (speed <= PCIE_SPEED_128_0GT);\n }\n \n static u16 pci_bus_speed2lnkctl2(enum pci_bus_speed speed)\n@@ -62,6 +62,7 @@ static u16 pci_bus_speed2lnkctl2(enum pci_bus_speed speed)\n \t\t[PCIE_SPEED_16_0GT] = PCI_EXP_LNKCTL2_TLS_16_0GT,\n \t\t[PCIE_SPEED_32_0GT] = PCI_EXP_LNKCTL2_TLS_32_0GT,\n \t\t[PCIE_SPEED_64_0GT] = PCI_EXP_LNKCTL2_TLS_64_0GT,\n+\t\t[PCIE_SPEED_128_0GT] = PCI_EXP_LNKCTL2_TLS_128_0GT,\n \t};\n \n \tif (WARN_ON_ONCE(!pcie_valid_speed(speed)))\n@@ -70,7 +71,7 @@ static u16 pci_bus_speed2lnkctl2(enum pci_bus_speed speed)\n \treturn speed_conv[speed];\n }\n \n-static inline u16 pcie_supported_speeds2target_speed(u8 supported_speeds)\n+static inline u16 pcie_supported_speeds2target_speed(u16 supported_speeds)\n {\n \treturn __fls(supported_speeds);\n }\n@@ -88,7 +89,7 @@ static inline u16 pcie_supported_speeds2target_speed(u8 supported_speeds)\n static u16 pcie_bwctrl_select_speed(struct pci_dev *port, enum pci_bus_speed speed_req)\n {\n \tstruct pci_bus *bus = port->subordinate;\n-\tu8 desired_speeds, supported_speeds;\n+\tu16 desired_speeds, supported_speeds;\n \tstruct pci_dev *dev;\n \n \tdesired_speeds = GENMASK(pci_bus_speed2lnkctl2(speed_req),\ndiff --git a/drivers/pci/pcie/portdrv.c b/drivers/pci/pcie/portdrv.c\nindex 38a41ccf79b9a..5ee8795107f26 100644\n--- a/drivers/pci/pcie/portdrv.c\n+++ b/drivers/pci/pcie/portdrv.c\n@@ -274,7 +274,7 @@ static int get_port_device_capability(struct pci_dev *dev)\n \n \t\tpcie_capability_read_dword(dev, PCI_EXP_LNKCAP, &linkcap);\n \t\tif (linkcap & PCI_EXP_LNKCAP_LBNC &&\n-\t\t hweight8(dev->supported_speeds) > 1)\n+\t\t hweight16(dev->supported_speeds) > 1)\n \t\t\tservices |= PCIE_PORT_SERVICE_BWCTRL;\n \t}\n \ndiff --git a/drivers/thermal/pcie_cooling.c b/drivers/thermal/pcie_cooling.c\nindex a876d64f15827..9a2e39398674b 100644\n--- a/drivers/thermal/pcie_cooling.c\n+++ b/drivers/thermal/pcie_cooling.c\n@@ -75,6 +75,7 @@ static_assert(PCIE_SPEED_5_0GT + 1 == PCIE_SPEED_8_0GT);\n static_assert(PCIE_SPEED_8_0GT + 1 == PCIE_SPEED_16_0GT);\n static_assert(PCIE_SPEED_16_0GT + 1 == PCIE_SPEED_32_0GT);\n static_assert(PCIE_SPEED_32_0GT + 1 == PCIE_SPEED_64_0GT);\n+static_assert(PCIE_SPEED_64_0GT + 1 == PCIE_SPEED_128_0GT);\n \n MODULE_AUTHOR(\"Ilpo Järvinen \");\n MODULE_DESCRIPTION(\"PCIe cooling driver\");\n","prefixes":["RFC","3/3"]}