{"id":2197080,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2197080/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260216225228.53959-11-philmd@linaro.org>","date":"2026-02-16T22:52:26","name":"[10/11] target/m68k: Remove MonitorDef register entries available via gdbstub","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"cf3951482d9dda42f20829fc6b09256331e05508","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/1.0/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260216225228.53959-11-philmd@linaro.org/mbox/","series":[{"id":492361,"url":"http://patchwork.ozlabs.org/api/1.0/series/492361/?format=json","date":"2026-02-16T22:52:16","name":"monitor/hmp: Automatically handle gdb-xml exposed registers","version":1,"mbox":"http://patchwork.ozlabs.org/series/492361/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2197080/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=lEOyHr95;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::42f;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x42f.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"All these registers are already provided by via gdbstub parsed XML\nand handler by the gdb_get_register() helper in the monitor/hmp.c\nfile. Remove as now unreachable code.\n\nSigned-off-by: Philippe Mathieu-Daudé \n---\n target/m68k/monitor.c | 18 ------------------\n 1 file changed, 18 deletions(-)","diff":"diff --git a/target/m68k/monitor.c b/target/m68k/monitor.c\nindex 6d101c75df0..08ced037b47 100644\n--- a/target/m68k/monitor.c\n+++ b/target/m68k/monitor.c\n@@ -24,24 +24,6 @@ void hmp_info_tlb(Monitor *mon, const QDict *qdict)\n }\n \n static const MonitorDef monitor_defs[] = {\n- { \"d0\", offsetof(CPUM68KState, dregs[0]), NULL, MD_I32 },\n- { \"d1\", offsetof(CPUM68KState, dregs[1]), NULL, MD_I32 },\n- { \"d2\", offsetof(CPUM68KState, dregs[2]), NULL, MD_I32 },\n- { \"d3\", offsetof(CPUM68KState, dregs[3]), NULL, MD_I32 },\n- { \"d4\", offsetof(CPUM68KState, dregs[4]), NULL, MD_I32 },\n- { \"d5\", offsetof(CPUM68KState, dregs[5]), NULL, MD_I32 },\n- { \"d6\", offsetof(CPUM68KState, dregs[6]), NULL, MD_I32 },\n- { \"d7\", offsetof(CPUM68KState, dregs[7]), NULL, MD_I32 },\n- { \"a0\", offsetof(CPUM68KState, aregs[0]), NULL, MD_I32 },\n- { \"a1\", offsetof(CPUM68KState, aregs[1]), NULL, MD_I32 },\n- { \"a2\", offsetof(CPUM68KState, aregs[2]), NULL, MD_I32 },\n- { \"a3\", offsetof(CPUM68KState, aregs[3]), NULL, MD_I32 },\n- { \"a4\", offsetof(CPUM68KState, aregs[4]), NULL, MD_I32 },\n- { \"a5\", offsetof(CPUM68KState, aregs[5]), NULL, MD_I32 },\n- { \"a6\", offsetof(CPUM68KState, aregs[6]), NULL, MD_I32 },\n- { \"a7\", offsetof(CPUM68KState, aregs[7]), NULL, MD_I32 },\n- { \"pc\", offsetof(CPUM68KState, pc), NULL, MD_I32 },\n- { \"sr\", offsetof(CPUM68KState, sr), NULL, MD_I32 },\n { \"ssp\", offsetof(CPUM68KState, sp[0]), NULL, MD_I32 },\n { \"usp\", offsetof(CPUM68KState, sp[1]), NULL, MD_I32 },\n { \"isp\", offsetof(CPUM68KState, sp[2]), NULL, MD_I32 },\n","prefixes":["10/11"]}