{"id":2197061,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2197061/?format=json","project":{"id":14,"url":"http://patchwork.ozlabs.org/api/1.0/projects/14/?format=json","name":"QEMU Development","link_name":"qemu-devel","list_id":"qemu-devel.nongnu.org","list_email":"qemu-devel@nongnu.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260216225228.53959-2-philmd@linaro.org>","date":"2026-02-16T22:52:17","name":"[01/11] target/sparc: Introduce sparc_cpu_register_gdb_regs() stub","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"74a902389ceb70621a8ec8d45d971b0df645573f","submitter":{"id":85046,"url":"http://patchwork.ozlabs.org/api/1.0/people/85046/?format=json","name":"Philippe Mathieu-Daudé","email":"philmd@linaro.org"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/qemu-devel/patch/20260216225228.53959-2-philmd@linaro.org/mbox/","series":[{"id":492361,"url":"http://patchwork.ozlabs.org/api/1.0/series/492361/?format=json","date":"2026-02-16T22:52:16","name":"monitor/hmp: Automatically handle gdb-xml exposed registers","version":1,"mbox":"http://patchwork.ozlabs.org/series/492361/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2197061/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=JpQ35XCz;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8","Content-Transfer-Encoding":"8bit","Received-SPF":"pass client-ip=2a00:1450:4864:20::32a;\n envelope-from=philmd@linaro.org; helo=mail-wm1-x32a.google.com","X-Spam_score_int":"-20","X-Spam_score":"-2.1","X-Spam_bar":"--","X-Spam_report":"(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no","X-Spam_action":"no action","X-BeenThere":"qemu-devel@nongnu.org","X-Mailman-Version":"2.1.29","Precedence":"list","List-Id":"qemu development ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org","Sender":"qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"},"content":"Introduce sparc_cpu_register_gdb_regs() which we are going\nto fill in the next commits.\n\nSigned-off-by: Philippe Mathieu-Daudé \n---\n target/sparc/cpu.h | 1 +\n target/sparc/cpu.c | 2 ++\n target/sparc/gdbstub.c | 9 +++++++++\n 3 files changed, 12 insertions(+)","diff":"diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h\nindex 7169a502432..0139732e4cc 100644\n--- a/target/sparc/cpu.h\n+++ b/target/sparc/cpu.h\n@@ -586,6 +586,7 @@ hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);\n void sparc_cpu_do_interrupt(CPUState *cpu);\n int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);\n int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);\n+void sparc_cpu_register_gdb_regs(CPUState *cs);\n G_NORETURN void sparc_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,\n MMUAccessType access_type,\n int mmu_idx,\ndiff --git a/target/sparc/cpu.c b/target/sparc/cpu.c\nindex 3991681d1d1..f58d0298966 100644\n--- a/target/sparc/cpu.c\n+++ b/target/sparc/cpu.c\n@@ -897,6 +897,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error **errp)\n return;\n }\n \n+ sparc_cpu_register_gdb_regs(cs);\n+\n qemu_init_vcpu(cs);\n \n scc->parent_realize(dev, errp);\ndiff --git a/target/sparc/gdbstub.c b/target/sparc/gdbstub.c\nindex 134617fb232..79d661fbc10 100644\n--- a/target/sparc/gdbstub.c\n+++ b/target/sparc/gdbstub.c\n@@ -215,3 +215,12 @@ int sparc_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n)\n return 8;\n #endif\n }\n+\n+void sparc_cpu_register_gdb_regs(CPUState *cs)\n+{\n+#if defined(TARGET_ABI32) || !defined(TARGET_SPARC64)\n+ /* Not yet supported */\n+#else\n+ /* Not yet supported */\n+#endif\n+}\n","prefixes":["01/11"]}