{"id":2196336,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196336/?format=json","project":{"id":35,"url":"http://patchwork.ozlabs.org/api/1.0/projects/35/?format=json","name":"Linux I2C development","link_name":"linux-i2c","list_id":"linux-i2c.vger.kernel.org","list_email":"linux-i2c@vger.kernel.org","web_url":"","scm_url":"","webscm_url":""},"msgid":"<20260213132058.521474-4-quic_nihalkum@quicinc.com>","date":"2026-02-13T13:20:56","name":"[v10,3/5] arm64: dts: qcom: monaco: Add camera MCLK pinctrl","commit_ref":null,"pull_url":null,"state":"not-applicable","archived":false,"hash":"028b39679708bdd32b95fd349ef5b377e8c81866","submitter":{"id":91662,"url":"http://patchwork.ozlabs.org/api/1.0/people/91662/?format=json","name":"Nihal Kumar Gupta","email":"quic_nihalkum@quicinc.com"},"delegate":null,"mbox":"http://patchwork.ozlabs.org/project/linux-i2c/patch/20260213132058.521474-4-quic_nihalkum@quicinc.com/mbox/","series":[{"id":492094,"url":"http://patchwork.ozlabs.org/api/1.0/series/492094/?format=json","date":"2026-02-13T13:20:53","name":"Add CCI and imx577 sensor support for monaco evk","version":10,"mbox":"http://patchwork.ozlabs.org/series/492094/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2196336/checks/","tags":{},"headers":{"Return-Path":"\n <linux-i2c+bounces-15985-incoming=patchwork.ozlabs.org@vger.kernel.org>","X-Original-To":["incoming@patchwork.ozlabs.org","linux-i2c@vger.kernel.org"],"Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=quicinc.com header.i=@quicinc.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=YDbvcy+V;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-i2c+bounces-15985-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)","smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com\n header.b=\"YDbvcy+V\"","smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.180.131","smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=quicinc.com","smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=quicinc.com"],"Received":["from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fCCZR0ClCz1xpl\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 14 Feb 2026 00:24:47 +1100 (AEDT)","from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id D77CF30E0A96\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 13 Feb 2026 13:22:04 +0000 (UTC)","from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 9827536164D;\n\tFri, 13 Feb 2026 13:21:51 +0000 (UTC)","from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com\n [205.220.180.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 1669336073D;\n\tFri, 13 Feb 2026 13:21:49 +0000 (UTC)","from pps.filterd (m0279869.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 61DB8RQS2093750;\n\tFri, 13 Feb 2026 13:21:44 GMT","from nalasppmta02.qualcomm.com (Global_NAT1.qualcomm.com\n [129.46.96.20])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4c9k6y3sth-1\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n\tFri, 13 Feb 2026 13:21:44 +0000 (GMT)","from nalasex01c.na.qualcomm.com (nalasex01c.na.qualcomm.com\n [10.47.97.35])\n\tby NALASPPMTA02.qualcomm.com (8.18.1.2/8.18.1.2) with ESMTPS id\n 61DDLhpo003790\n\t(version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT);\n\tFri, 13 Feb 2026 13:21:43 GMT","from hu-nihalkum-hyd.qualcomm.com (10.80.80.8) by\n nalasex01c.na.qualcomm.com (10.47.97.35) with Microsoft SMTP Server\n (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.2.2562.17; Fri, 13 Feb 2026 05:21:37 -0800"],"ARC-Seal":"i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1770988911; cv=none;\n b=PqkLUGRPrV4hhhlFSlnSf1NkATscyQTvnfad+vMf0i7Ok/vKKP36O4dnUigYbwurxR8Azg0EqpcWHiZTMYQdrVCZbVjbe32Vad4+py9q3nvVHLssGZs9a4UZYcBiqWTc/vNDT0ppvNvv19xXsEiAHz4ntItkvA422paRNnghlXg=","ARC-Message-Signature":"i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1770988911; c=relaxed/simple;\n\tbh=jbi2GadyQctNBHS7fIRp9DFm58Zhc5CPQNKdKAwY5cs=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=YF6h20B2iT/l6YBavyar6lQnv689Oi2gUFC1N4ugvT6n2tdMH3vRwU4r8PLdsCCWmT4YzMmgy6v9Mg9VFzQ4dqS990wjp5ieD6zEaEEHXqUzIdLJhmFksb6hpraxzWAoBE4dSZ9kjKmSwls7ui0zFloQvrtixhFmgPuTFla6EqM=","ARC-Authentication-Results":"i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=quicinc.com;\n spf=pass smtp.mailfrom=quicinc.com;\n dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com\n header.b=YDbvcy+V; arc=none smtp.client-ip=205.220.180.131","DKIM-Signature":"v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h=\n\tcc:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=qcppdkim1; bh=\n\tIgpXPeM8zut4YLe/rqAV5agPYoCmCFqxeE882RMTHAI=; b=YDbvcy+VTo0TgVw5\n\tQcAeLark6BY9XKf8khWfani8YTg4vOunho3lpeEhG2becna0Hasm/ktNIbshCIx6\n\tjVNdHhranUDQ7CUouj//NPHengIwOM7lVCUKa+Bw4EDB8bNN+/yODzEgEzQ0owZF\n\tlXplTzQe+IEVqxbfEYObC8hAmrQwM5nQJgs+BmBtahS5LPXdmLHNi/Zta6eap+of\n\tFNlRRv6e87+4p+yloKqGwhGvgAIKdsRSXAf+/nBRpDda3+s2FbvRQWEnIgsdcqe9\n\t2MGhEHDym4QwsqMHkOlOH6I7nXz6Eq0ER+GpUr+ywH7N9NT3rP45FhZ8WdMnmBl+\n\tHWR3DA==","From":"Nihal Kumar Gupta <quic_nihalkum@quicinc.com>","To":"<bryan.odonoghue@linaro.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,\n        <conor+dt@kernel.org>, <andersson@kernel.org>,\n        <konradybcio@kernel.org>, <hverkuil-cisco@xs4all.nl>,\n        <loic.poulain@oss.qualcomm.com>, <rfoss@kernel.org>,\n        <andi.shyti@kernel.org>, <linux-i2c@vger.kernel.org>,\n        <cros-qcom-dts-watchers@chromium.org>","CC":"<quic_svankada@quicinc.com>, <quic_vikramsa@quicinc.com>,\n        <linux-media@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,\n        <devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,\n        Konrad Dybcio\n\t<konrad.dybcio@oss.qualcomm.com>,\n        Vladimir Zapolskiy\n\t<vladimir.zapolskiy@linaro.org>","Subject":"[PATCH v10 3/5] arm64: dts: qcom: monaco: Add camera MCLK pinctrl","Date":"Fri, 13 Feb 2026 18:50:56 +0530","Message-ID":"<20260213132058.521474-4-quic_nihalkum@quicinc.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260213132058.521474-1-quic_nihalkum@quicinc.com>","References":"<20260213132058.521474-1-quic_nihalkum@quicinc.com>","Precedence":"bulk","X-Mailing-List":"linux-i2c@vger.kernel.org","List-Id":"<linux-i2c.vger.kernel.org>","List-Subscribe":"<mailto:linux-i2c+subscribe@vger.kernel.org>","List-Unsubscribe":"<mailto:linux-i2c+unsubscribe@vger.kernel.org>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","Content-Type":"text/plain","X-ClientProxiedBy":"nasanex01a.na.qualcomm.com (10.52.223.231) To\n nalasex01c.na.qualcomm.com (10.47.97.35)","X-QCInternal":"smtphost","X-Proofpoint-Virus-Version":["vendor=nai engine=6200 definitions=5800\n signatures=585085","vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-02-13_02,2026-02-12_03,2025-10-01_01"],"X-Authority-Analysis":"v=2.4 cv=NsTcssdJ c=1 sm=1 tr=0 ts=698f2568 cx=c_pps\n a=ouPCqIW2jiPt+lZRy3xVPw==:117 a=ouPCqIW2jiPt+lZRy3xVPw==:17\n a=GEpy-HfZoHoA:10 a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22\n a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=COk6AnOGAAAA:8\n a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=tfCBMw9KTM5U2-pTabYA:9\n a=TjNXssC_j7lpFel5tvFf:22 a=cvBusfyB2V15izCimMoJ:22","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwMjEzMDEwMyBTYWx0ZWRfXyQgd8g031a2H\n L8FqAZVBBKTG7U9v4Z40SOY/ZMQgn7IvijJldHB4uA6IcJYdFopRlTWIOxX6X2cjBICMdqqVXH5\n c9VoetkuklipynurDV4LXkuS7O9DKv4r0ImiFwR30MgH5ckUYA24LYTxWiv6sMCtLbBUdrO2FOy\n L0RDACplGseixhWp4+vciNq+rt3gIBbzPxiUdYOwCWpGQYktzLliEueMa56EMWTI7EN9yefgDNP\n +pikTLrOyS6o1J7o4TQKYoBjJGay5vlGJ1YW+APgsMpl9RQoxd+++U7PTkjxZpd8V627jhXeTn/\n 9TczwW+z/u1ralLic2ACc1wm3D3xd+s5HDWSGLcyOVWsKHUg0ZN+unBBu6Izo5vNYZnxb377or3\n gtyIWvAuJ+1XJ30jz0oeCrx5es/dys7PbcyXyLlAjYIvdBpUcQvGfDrkcqzCx47G4pK4TEQr+ME\n 1h0znHqWJQyGnXOEJIA==","X-Proofpoint-GUID":"aKihILjcvIs7lQUoJdmly7U1zmbYogZ_","X-Proofpoint-ORIG-GUID":"aKihILjcvIs7lQUoJdmly7U1zmbYogZ_","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n bulkscore=0 impostorscore=0 spamscore=0 suspectscore=0 priorityscore=1501\n lowpriorityscore=0 adultscore=0 phishscore=0 malwarescore=0 clxscore=1015\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602130103"},"content":"Define pinctrl definitions to enable camera master clocks on Monaco.\n\nSigned-off-by: Nihal Kumar Gupta <quic_nihalkum@quicinc.com>\nReviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>\nReviewed-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>\n---\n arch/arm64/boot/dts/qcom/monaco.dtsi | 21 +++++++++++++++++++++\n 1 file changed, 21 insertions(+)","diff":"diff --git a/arch/arm64/boot/dts/qcom/monaco.dtsi b/arch/arm64/boot/dts/qcom/monaco.dtsi\nindex 405812db8fed..379e752f1953 100644\n--- a/arch/arm64/boot/dts/qcom/monaco.dtsi\n+++ b/arch/arm64/boot/dts/qcom/monaco.dtsi\n@@ -5987,6 +5987,27 @@ tlmm: pinctrl@f100000 {\n \t\t\t#interrupt-cells = <2>;\n \t\t\twakeup-parent = <&pdc>;\n \n+\t\t\tcam0_default: cam0-default-state {\n+\t\t\t\tpins = \"gpio67\";\n+\t\t\t\tfunction = \"cam_mclk\";\n+\t\t\t\tdrive-strength = <2>;\n+\t\t\t\tbias-disable;\n+\t\t\t};\n+\n+\t\t\tcam1_default: cam1-default-state {\n+\t\t\t\tpins = \"gpio68\";\n+\t\t\t\tfunction = \"cam_mclk\";\n+\t\t\t\tdrive-strength = <2>;\n+\t\t\t\tbias-disable;\n+\t\t\t};\n+\n+\t\t\tcam2_default: cam2-default-state {\n+\t\t\t\tpins = \"gpio69\";\n+\t\t\t\tfunction = \"cam_mclk\";\n+\t\t\t\tdrive-strength = <2>;\n+\t\t\t\tbias-disable;\n+\t\t\t};\n+\n \t\t\tcci0_0_default: cci0-0-default-state {\n \t\t\t\tsda-pins {\n \t\t\t\t\tpins = \"gpio57\";\n","prefixes":["v10","3/5"]}