{"id":2196308,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196308/?format=json","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.0/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260213112717.1256823-2-aswin.murugan@oss.qualcomm.com>","date":"2026-02-13T11:27:12","name":"[v2,1/6] reboot-mode: Use actual cell size instead of sizeof(u32)","commit_ref":null,"pull_url":null,"state":"new","archived":false,"hash":"0432f616f2cbecad3573a5353225aa55be5d9cbf","submitter":{"id":90811,"url":"http://patchwork.ozlabs.org/api/1.0/people/90811/?format=json","name":"Aswin Murugan","email":"aswin.murugan@oss.qualcomm.com"},"delegate":{"id":151538,"url":"http://patchwork.ozlabs.org/api/1.0/users/151538/?format=json","username":"kcxt","first_name":"Casey","last_name":"Connolly","email":"casey.connolly@linaro.org"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260213112717.1256823-2-aswin.murugan@oss.qualcomm.com/mbox/","series":[{"id":492084,"url":"http://patchwork.ozlabs.org/api/1.0/series/492084/?format=json","date":"2026-02-13T11:27:11","name":"qcom: Add NVMEM bitfield support and reboot‑mode integration","version":2,"mbox":"http://patchwork.ozlabs.org/series/492084/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2196308/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=op8BRi10;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=cs84S2pO;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=oss.qualcomm.com","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"op8BRi10\";\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"cs84S2pO\";\n\tdkim-atps=neutral","phobos.denx.de; dmarc=none (p=none dis=none)\n header.from=oss.qualcomm.com","phobos.denx.de;\n spf=pass smtp.mailfrom=aswin.murugan@oss.qualcomm.com"],"Received":["from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fC8zW49Z6z1xr1\n\tfor ; Fri, 13 Feb 2026 22:27:51 +1100 (AEDT)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 0F48783D71;\n\tFri, 13 Feb 2026 12:27:49 +0100 (CET)","by phobos.denx.de (Postfix, from userid 109)\n id 5C16F83CEE; Fri, 13 Feb 2026 12:27:46 +0100 (CET)","from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com\n [205.220.180.131])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 34A9D80B98\n for ; Fri, 13 Feb 2026 12:27:44 +0100 (CET)","from pps.filterd (m0279871.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 61D5KIAc454948\n for ; Fri, 13 Feb 2026 11:27:42 GMT","from mail-pj1-f70.google.com (mail-pj1-f70.google.com\n [209.85.216.70])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4c9mev36nj-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for ; Fri, 13 Feb 2026 11:27:42 +0000 (GMT)","by mail-pj1-f70.google.com with SMTP id\n 98e67ed59e1d1-354c0eb08ceso3190979a91.1\n for ; Fri, 13 Feb 2026 03:27:42 -0800 (PST)","from hu-aswinm-blr.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. 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peng.fan@nxp.com, quentin.schulz@cherry.de,\n n-francis@ti.com, xypron.glpk@gmx.de, h-vm@ti.com, justin@tidylabs.net,\n jamie.gibbons@microchip.com, ycliang@andestech.com, me@samcday.com,\n sughosh.ganu@arm.com, gchan9527@gmail.com, ilias.apalodimas@linaro.org,\n Aswin Murugan ","Subject":"[PATCH v2 1/6] reboot-mode: Use actual cell size instead of\n sizeof(u32)","Date":"Fri, 13 Feb 2026 16:57:12 +0530","Message-Id":"<20260213112717.1256823-2-aswin.murugan@oss.qualcomm.com>","X-Mailer":"git-send-email 2.34.1","In-Reply-To":"<20260213112717.1256823-1-aswin.murugan@oss.qualcomm.com>","References":"<20260213112717.1256823-1-aswin.murugan@oss.qualcomm.com>","MIME-Version":"1.0","Content-Transfer-Encoding":"8bit","X-Authority-Analysis":"v=2.4 cv=Zq7g6t7G c=1 sm=1 tr=0 ts=698f0aae cx=c_pps\n a=0uOsjrqzRL749jD1oC5vDA==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8\n a=5QhIOPboivaRtBlMk4QA:9 a=mQ_c8vxmzFEMiUWkPHU9:22","X-Proofpoint-ORIG-GUID":"tXjYEibwNuo0LTMTYceVXJk5z-Ia8A0M","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwMjEzMDA4NyBTYWx0ZWRfX3gwCBwJv9ctx\n pNUzjX4lsMHekfWybPn+fZaiiTGj1bG1klqa9Fn31svQXhyF7DS1Zua/C5iAX01YU7CcmjbQ6fa\n pKfcxbcvpgZLwYfwmwKCiBymWlTTbF+RGIfutUOtSm6Oi07G23KG996CkcEvjFeoQ92fFHq01AM\n +FU6tp8i8182/Ks/5ZGaXjbUlvoTJi3CH3xvbIcF/vvCmFMWd8Cg0uNIif52LajY33C2i6fKxvT\n /0qXiMZF0FBR5W6pWEuqDaaiwb3COUaJV9vZ2NvQF1AQIBEOdmPnxs0YnXi1SH7KRM4mhHwKR8W\n MQnncOveddwvhUN+DI9lniWtQu4H0HbWRa6q3yGOPHCwlnNxjJyohnk31LoftMV44kvb4XI5pEE\n z23z2HhLrZBjyuzDlsb39UswWOAKcqV2tdo7Ukmfq7FD9zkDRM/qmPp26qSzn9E0HQZ/yoMfHYs\n DHeMcFlg1WjOJh/s3yA==","X-Proofpoint-GUID":"tXjYEibwNuo0LTMTYceVXJk5z-Ia8A0M","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-02-13_01,2026-02-12_03,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n clxscore=1015 lowpriorityscore=0 adultscore=0 priorityscore=1501\n impostorscore=0 suspectscore=0 malwarescore=0 phishscore=0 bulkscore=0\n spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound\n adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000\n definitions=main-2602130087","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"The nvmem reboot-mode driver hardcodes sizeof(u32) for NVMEM read/write\noperations. This fails on platforms where the reboot reason storage is\nsmaller than 4 bytes.\n\nOn Qualcomm platforms with single-byte PMIC register storage, attempting\nto read 4 bytes from a 1-byte cell causes the NVMEM subsystem to return\n-EINVAL, breaking reboot-mode functionality.\n\nReplace sizeof(*mode) and sizeof(mode) with priv->cell.size to use the\nactual NVMEM cell size. Also initialize *mode to 0 in reboot_mode_get()\nto ensure a clean state for cells smaller than u32.\n\nThis allows the driver to work with cells of any size, from single bytes\nto multi-byte words.\n\nSigned-off-by: Aswin Murugan \n---\n drivers/reboot-mode/reboot-mode-nvmem.c | 5 +++--\n 1 file changed, 3 insertions(+), 2 deletions(-)","diff":"diff --git a/drivers/reboot-mode/reboot-mode-nvmem.c b/drivers/reboot-mode/reboot-mode-nvmem.c\nindex b9af242520a..60307cce49f 100644\n--- a/drivers/reboot-mode/reboot-mode-nvmem.c\n+++ b/drivers/reboot-mode/reboot-mode-nvmem.c\n@@ -18,15 +18,16 @@ struct nvmem_reboot_mode_priv {\n static int reboot_mode_get(struct udevice *dev, u32 *mode)\n {\n \tstruct nvmem_reboot_mode_priv *priv = dev_get_priv(dev);\n+\t*mode = 0;\n \n-\treturn nvmem_cell_read(&priv->cell, mode, sizeof(*mode));\n+\treturn nvmem_cell_read(&priv->cell, mode, priv->cell.size);\n }\n \n static int reboot_mode_set(struct udevice *dev, u32 mode)\n {\n \tstruct nvmem_reboot_mode_priv *priv = dev_get_priv(dev);\n \n-\treturn nvmem_cell_write(&priv->cell, &mode, sizeof(mode));\n+\treturn nvmem_cell_write(&priv->cell, &mode, priv->cell.size);\n }\n \n static const struct reboot_mode_ops nvmem_reboot_mode_ops = {\n","prefixes":["v2","1/6"]}