{"id":2196242,"url":"http://patchwork.ozlabs.org/api/1.0/patches/2196242/?format=json","project":{"id":18,"url":"http://patchwork.ozlabs.org/api/1.0/projects/18/?format=json","name":"U-Boot","link_name":"uboot","list_id":"u-boot.lists.denx.de","list_email":"u-boot@lists.denx.de","web_url":null,"scm_url":null,"webscm_url":null},"msgid":"<20260213-talos_usb-v1-2-4c4355d61437@oss.qualcomm.com>","date":"2026-02-13T09:01:19","name":"[2/3] clk: qcom: qcs615: Add GCC_AHB2PHY_WEST_CLK clock support","commit_ref":null,"pull_url":null,"state":"accepted","archived":false,"hash":"e83e3eece3795d8d53e7adc7aaa16ebacb8c503c","submitter":{"id":90810,"url":"http://patchwork.ozlabs.org/api/1.0/people/90810/?format=json","name":"Balaji Selvanathan","email":"balaji.selvanathan@oss.qualcomm.com"},"delegate":{"id":151538,"url":"http://patchwork.ozlabs.org/api/1.0/users/151538/?format=json","username":"kcxt","first_name":"Casey","last_name":"Connolly","email":"casey.connolly@linaro.org"},"mbox":"http://patchwork.ozlabs.org/project/uboot/patch/20260213-talos_usb-v1-2-4c4355d61437@oss.qualcomm.com/mbox/","series":[{"id":492067,"url":"http://patchwork.ozlabs.org/api/1.0/series/492067/?format=json","date":"2026-02-13T09:01:18","name":"Enable USB High-Speed support for QCS615","version":1,"mbox":"http://patchwork.ozlabs.org/series/492067/mbox/"}],"check":"pending","checks":"http://patchwork.ozlabs.org/api/patches/2196242/checks/","tags":{},"headers":{"Return-Path":"","X-Original-To":"incoming@patchwork.ozlabs.org","Delivered-To":"patchwork-incoming@legolas.ozlabs.org","Authentication-Results":["legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=WZ1m3Xek;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=QUhdeSYO;\n\tdkim-atps=neutral","legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)","phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=oss.qualcomm.com","phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de","phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"WZ1m3Xek\";\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"QUhdeSYO\";\n\tdkim-atps=neutral","phobos.denx.de; dmarc=none (p=none dis=none)\n header.from=oss.qualcomm.com","phobos.denx.de; spf=pass\n smtp.mailfrom=balaji.selvanathan@oss.qualcomm.com"],"Received":["from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fC5lS6SQRz1xvQ\n\tfor ; Fri, 13 Feb 2026 20:02:12 +1100 (AEDT)","from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 3B9F183CEE;\n\tFri, 13 Feb 2026 10:01:57 +0100 (CET)","by phobos.denx.de (Postfix, from userid 109)\n id A21E283DBF; Fri, 13 Feb 2026 10:01:56 +0100 (CET)","from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com\n [205.220.180.131])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 7EA8083CEE\n for ; Fri, 13 Feb 2026 10:01:49 +0100 (CET)","from pps.filterd (m0279872.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 61D67HLF421513\n for ; Fri, 13 Feb 2026 09:01:48 GMT","from mail-pl1-f197.google.com (mail-pl1-f197.google.com\n [209.85.214.197])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4c9cy4ccjr-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for ; Fri, 13 Feb 2026 09:01:47 +0000 (GMT)","by mail-pl1-f197.google.com with SMTP id\n d9443c01a7336-2a94369653aso7535145ad.1\n for ; Fri, 13 Feb 2026 01:01:47 -0800 (PST)","from hu-bselvana-blr.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. 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charset=\"utf-8\"","Content-Transfer-Encoding":"7bit","Message-Id":"<20260213-talos_usb-v1-2-4c4355d61437@oss.qualcomm.com>","References":"<20260213-talos_usb-v1-0-4c4355d61437@oss.qualcomm.com>","In-Reply-To":"<20260213-talos_usb-v1-0-4c4355d61437@oss.qualcomm.com>","To":"Sumit Garg , u-boot-qcom@groups.io,\n u-boot@lists.denx.de","Cc":"Lukasz Majewski ,\n Casey Connolly ,\n Neil Armstrong ,\n Aswin Murugan ,\n Tom Rini ,\n Balaji Selvanathan ,\n Biswapriyo Nath ,\n Alexey Minnekhanov ,\n Sumit Garg ","X-Mailer":"b4 0.14.3","X-Developer-Signature":"v=1; a=ed25519-sha256; t=1770973294; l=1274;\n i=balaji.selvanathan@oss.qualcomm.com; s=20260213; h=from:subject:message-id;\n bh=HxPp74m9ZX55GzXx1OMevdqd0SzWUjU/KSSnail8szQ=;\n b=Kuer3Bx3bkPc4nSVCCIq7fIb5F3UUob665/AEO4DfwzEMXIoGN300iOTitDwsVc0ow/RJQDL4\n vX7PI3+54vGAk2Q6Xkl/VKGuZf3UplFx+/KrHC8VpthJLFuWcux+HnG","X-Developer-Key":"i=balaji.selvanathan@oss.qualcomm.com; a=ed25519;\n pk=CDpYiUU3SH7KGEtsBvY2tBGPiWfMxqWJF0p2LftOfnc=","X-Proofpoint-ORIG-GUID":"VAEUhUEbRxNjhIDGuMpCEveE1MOsfcV0","X-Proofpoint-GUID":"VAEUhUEbRxNjhIDGuMpCEveE1MOsfcV0","X-Authority-Analysis":"v=2.4 cv=XvX3+FF9 c=1 sm=1 tr=0 ts=698ee87b cx=c_pps\n a=cmESyDAEBpBGqyK7t0alAg==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=IkcTkHD0fZMA:10 a=HzLeVaNsDn8A:10 a=s4-Qcg_JpJYA:10\n a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22 a=GgsMoib0sEa3-_RKJdDe:22\n a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=jvnA7breJFyUQw32XGIA:9 a=QEXdDO2ut3YA:10\n a=1OuFwYUASf3TG4hYMiVC:22 a=cvBusfyB2V15izCimMoJ:22","X-Proofpoint-Spam-Details-Enc":"AW1haW4tMjYwMjEzMDA2OSBTYWx0ZWRfXz/EvUuxtEUQO\n zp4FZ5hwE545EKO8/epBtORSNhctFdRxNDt0a+F8Ij/u9x9gihr83y4pmiRMqOY9yVTVr39bGGw\n yaff/ITjPBfqpNYpHdpW8ejYe2zA0v47rf71QeFlq3Av/+/1TfTMzJOayoboJn3GhLLXcsrCYIo\n RWA2kzvaCcAsiAe3VHmoei4drAOinR4gg7I9kxQ2R/eIadmzqM8mHL/sqYK4TuslU1OC7HA7zwi\n qMy2pu5aGbe2jifTTXUSZAO+Pybp2tEWbZiVkvzcH4yxIGP0d9of2MC7jFATfH0qGuFVtxOsSrn\n v0R5gPS5Uc8uVU/Fq3IyaXfBWAYOH/1+RkrFyi3hua+E5p3sbACg7EKjUdp+7T87ACHjQVodVSZ\n 2xt+vZZI/tBL6DygH0rZjtHgGv7M9LyK9DVMKQHLoVo9G0CR+JQFdNLpcsc78EyRrbwOMfbfTAF\n dKH4DAy2uWdHU4C3qOw==","X-Proofpoint-Virus-Version":"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-02-13_01,2026-02-12_03,2025-10-01_01","X-Proofpoint-Spam-Details":"rule=outbound_notspam policy=outbound score=0\n suspectscore=0 priorityscore=1501 malwarescore=0 adultscore=0 phishscore=0\n bulkscore=0 lowpriorityscore=0 impostorscore=0 clxscore=1015 spamscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602130069","X-BeenThere":"u-boot@lists.denx.de","X-Mailman-Version":"2.1.39","Precedence":"list","List-Id":"U-Boot discussion ","List-Unsubscribe":",\n ","List-Archive":"","List-Post":"","List-Help":"","List-Subscribe":",\n ","Errors-To":"u-boot-bounces@lists.denx.de","Sender":"\"U-Boot\" ","X-Virus-Scanned":"clamav-milter 0.103.8 at phobos.denx.de","X-Virus-Status":"Clean"},"content":"Add GCC_AHB2PHY_WEST_CLK gate clock definition to the QCS615\nclock driver. This clock is required for proper PHY operation\nand eliminates clock-related warnings during USB initialization.\n\nSigned-off-by: Balaji Selvanathan \nReviewed-by: Sumit Garg \nReviewed-by: Neil Armstrong \n---\nChanges in v3:\n- No changes in v3\n\nChanges in v2:\n- No changes in v2\n---\n drivers/clk/qcom/clock-qcs615.c | 1 +\n 1 file changed, 1 insertion(+)","diff":"diff --git a/drivers/clk/qcom/clock-qcs615.c b/drivers/clk/qcom/clock-qcs615.c\nindex 65b8db04020..2087fc38f63 100644\n--- a/drivers/clk/qcom/clock-qcs615.c\n+++ b/drivers/clk/qcom/clock-qcs615.c\n@@ -67,6 +67,7 @@ static const struct gate_clk qcs615_clks[] = {\n \tGATE_CLK(GCC_USB3_PRIM_PHY_COM_AUX_CLK, 0xf054, BIT(0)),\n \tGATE_CLK(GCC_USB3_PRIM_PHY_PIPE_CLK, 0xf058, BIT(0)),\n \tGATE_CLK(GCC_USB3_PRIM_CLKREF_CLK, 0x8c014, BIT(0)),\n+\tGATE_CLK(GCC_AHB2PHY_WEST_CLK, 0x6a004, BIT(0)),\n \tGATE_CLK(GCC_QUPV3_WRAP0_S0_CLK, 0x5200c, GCC_QUPV3_WRAP0_S0_CLK_ENA_BIT),\n \tGATE_CLK(GCC_QUPV3_WRAP0_S1_CLK, 0x5200c, GCC_QUPV3_WRAP0_S1_CLK_ENA_BIT),\n \tGATE_CLK(GCC_QUPV3_WRAP0_S2_CLK, 0x5200c, GCC_QUPV3_WRAP0_S2_CLK_ENA_BIT),\n","prefixes":["2/3"]}